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[dv, aon_timer] Waiving RTL unreachable statements pending rtl change #26165

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merged 1 commit into from
Feb 17, 2025
Merged

[dv, aon_timer] Waiving RTL unreachable statements pending rtl change #26165

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3 changes: 2 additions & 1 deletion hw/ip/aon_timer/dv/aon_timer_sim_cfg.hjson
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,8 @@

// Add specific exclusion files.
vcs_cov_excl_files: ["{proj_root}/hw/ip/aon_timer/dv/cov/aon_timer_unr_excl.el",
"{proj_root}/hw/ip/aon_timer/dv/cov/aon_timer_unr_manually_excluded_excl.el"]
"{proj_root}/hw/ip/aon_timer/dv/cov/aon_timer_unr_manually_excluded_excl.el",
"{proj_root}/hw/ip/aon_timer/dv/cov/rtl_exclusions_pending_rtl_changes.el"]

// Default UVM test and seq class name.
uvm_test: aon_timer_base_test
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83 changes: 83 additions & 0 deletions hw/ip/aon_timer/dv/cov/rtl_exclusions_pending_rtl_changes.el
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Original file line number Diff line number Diff line change
@@ -0,0 +1,83 @@
// Copyright lowRISC contributors (OpenTitan project).
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
//
//==================================================
// This file contains the Excluded objects
// Generated By User: amz
// Format Version: 2
// Date: Fri Feb 7 15:32:07 2025
// ExclMode: default
//==================================================
CHECKSUM: "2180545894 2543311903"
INSTANCE: tb.dut.u_reg.u_wkup_count_hi_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Block 43 "3846199569" "gen_wr_req.state_d = StIdle;"
CHECKSUM: "2180545894 2543311903"
INSTANCE: tb.dut.u_reg.u_wkup_count_lo_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Block 43 "3846199569" "gen_wr_req.state_d = StIdle;"
CHECKSUM: "2180545894 2543311903"
INSTANCE: tb.dut.u_reg.u_wdog_count_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Block 43 "3846199569" "gen_wr_req.state_d = StIdle;"
CHECKSUM: "2180545894 2543311903"
INSTANCE: tb.dut.u_reg.u_wkup_cause_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Block 43 "3846199569" "gen_wr_req.state_d = StIdle;"
CHECKSUM: "2180545894 3849341449"
INSTANCE: tb.dut.u_reg.u_wkup_count_hi_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Branch 4 "3547459906" "gen_wr_req.state_q" (6) "gen_wr_req.state_q default,-,-,-,-"
CHECKSUM: "2180545894 3849341449"
INSTANCE: tb.dut.u_reg.u_wkup_count_lo_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Branch 4 "3547459906" "gen_wr_req.state_q" (6) "gen_wr_req.state_q default,-,-,-,-"
CHECKSUM: "2180545894 3849341449"
INSTANCE: tb.dut.u_reg.u_wdog_count_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Branch 4 "3547459906" "gen_wr_req.state_q" (6) "gen_wr_req.state_q default,-,-,-,-"
CHECKSUM: "2180545894 3849341449"
INSTANCE: tb.dut.u_reg.u_wkup_cause_cdc.u_arb
ANNOTATION: "Default statement can't be hit."
Branch 4 "3547459906" "gen_wr_req.state_q" (6) "gen_wr_req.state_q default,-,-,-,-"
CHECKSUM: "1125143680 279071062"
INSTANCE: tb.dut.u_reg.u_wkup_count_hi_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 4 "937119686" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 279071062"
INSTANCE: tb.dut.u_reg.u_wkup_count_lo_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 4 "937119686" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 279071062"
INSTANCE: tb.dut.u_reg.u_wdog_count_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 4 "937119686" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 3293469597"
INSTANCE: tb.dut.u_reg.u_wkup_cause_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 5 "937119686" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 1408670975"
INSTANCE: tb.dut.u_reg.u_wkup_ctrl_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 3 "86646938" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 1408670975"
INSTANCE: tb.dut.u_reg.u_wkup_thold_hi_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 3 "86646938" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 1408670975"
INSTANCE: tb.dut.u_reg.u_wkup_thold_lo_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 3 "86646938" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 1408670975"
INSTANCE: tb.dut.u_reg.u_wdog_bark_thold_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 3 "86646938" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 1408670975"
INSTANCE: tb.dut.u_reg.u_wdog_bite_thold_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 3 "86646938" "(src_busy_q && src_ack) 1 -1" (1 "01")
CHECKSUM: "1125143680 1408670975"
INSTANCE: tb.dut.u_reg.u_wdog_ctrl_cdc
ANNOTATION: "Src_ack will only be set after src_busy_q is set. This can be removed via RTL modification, and it will be revisited after the next CDC sign-off. Issue is #26164"
Condition 3 "86646938" "(src_busy_q && src_ack) 1 -1" (1 "01")
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