lowRISC · a-will · Dec 20, 2024 · Dec 20, 2024 · Dec 20, 2024 · Dec 18, 2024
diff --git a/hw/ip/prim/prim_mubi.core b/hw/ip/prim/prim_mubi.core
@@ -16,8 +16,8 @@ filesets:
       - lowrisc:prim:assert
       - lowrisc:prim:buf
       - lowrisc:prim:flop
+      - lowrisc:prim:mubi_pkg
     files:
-      - rtl/prim_mubi_pkg.sv
       - rtl/prim_mubi4_sender.sv
       - rtl/prim_mubi4_sync.sv
       - rtl/prim_mubi4_dec.sv

diff --git a/hw/ip/prim/prim_mubi_pkg.core b/hw/ip/prim/prim_mubi_pkg.core
@@ -0,0 +1,45 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+# PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+#
+#    util/design/gen-mubi.py
+#
+name: "lowrisc:prim:mubi_pkg:0.1"
+description: "Multibit types and functions"
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:prim:assert
+    files:
+      - rtl/prim_mubi_pkg.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+      - lint/prim_mubi.waiver
+    file_type: waiver
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+targets:
+  default: &default_target
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl
diff --git a/hw/ip/prim_generic/prim_generic_flash.core b/hw/ip/prim_generic/prim_generic_flash.core
@@ -8,7 +8,7 @@ description: "prim"
 filesets:
   files_rtl:
     depend:
-      - lowrisc:ip:tlul
+      - lowrisc:tlul:headers
       - lowrisc:prim:ram_1p
       - "fileset_partner  ? (partner:systems:ast_pkg)"
       - "!fileset_partner ? (lowrisc:systems:ast_pkg)"

diff --git a/hw/ip/tlul/adapter_sram.core b/hw/ip/tlul/adapter_sram.core
@@ -8,8 +8,10 @@ description: "TL-UL to SRAM adapter (device)"
 filesets:
   files_rtl:
     depend:
-      - lowrisc:prim:util
       - lowrisc:prim:assert
+      - lowrisc:prim:flop
+      - lowrisc:prim:sec_anchor
+      - lowrisc:prim:util
       - lowrisc:tlul:common
     files:
       - rtl/tlul_sram_byte.sv

diff --git a/hw/ip/tlul/headers.core b/hw/ip/tlul/headers.core
@@ -10,7 +10,7 @@ filesets:
     depend:
       - lowrisc:constants:top_pkg
       - lowrisc:prim:secded
-      - lowrisc:prim:mubi
+      - lowrisc:prim:mubi_pkg
     files:
       - rtl/tlul_pkg.sv
     file_type: systemVerilogSource

diff --git a/hw/ip_templates/clkmgr/clkmgr_pkg.core.tpl b/hw/ip_templates/clkmgr/clkmgr_pkg.core.tpl
@@ -13,7 +13,9 @@ filesets:
       - lowrisc:constants:top_pkg
       - lowrisc:ip_interfaces:pwrmgr_pkg
       - lowrisc:prim:mubi
+      - lowrisc:tlul:headers
     files:
+      - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/ip_templates/clkmgr/clkmgr_reg.core.tpl b/hw/ip_templates/clkmgr/clkmgr_reg.core.tpl
@@ -10,9 +10,10 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
+      - lowrisc:ip:tlul
+      - lowrisc:prim:subreg
+      - ${instance_vlnv("lowrisc:ip:clkmgr_pkg")}
     files:
-      - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/ip_templates/flash_ctrl/flash_ctrl_prim_reg_top.core b/hw/ip_templates/flash_ctrl/flash_ctrl_prim_reg_top.core
@@ -8,6 +8,7 @@ filesets:
   files_rtl:
     depend:
       - lowrisc:ip_interfaces:flash_ctrl_pkg
+      - lowrisc:prim:subreg
     files:
       - rtl/flash_ctrl_prim_reg_top.sv
     file_type: systemVerilogSource

diff --git a/hw/ip_templates/flash_ctrl/flash_ctrl_reg.core.tpl b/hw/ip_templates/flash_ctrl/flash_ctrl_reg.core.tpl
@@ -10,6 +10,7 @@ virtual:
 filesets:
   files_rtl:
     depend:
+      - lowrisc:prim:subreg
       - lowrisc:tlul:headers
     files:
       - rtl/flash_ctrl_reg_pkg.sv

diff --git a/hw/ip_templates/pinmux/pinmux_reg.core.tpl b/hw/ip_templates/pinmux/pinmux_reg.core.tpl
@@ -10,6 +10,7 @@ virtual:
 filesets:
   files_rtl:
     depend:
+      - lowrisc:prim:subreg
       - lowrisc:tlul:headers
     files:
       - rtl/pinmux_reg_pkg.sv

diff --git a/hw/ip_templates/pwrmgr/pwrmgr.core.tpl b/hw/ip_templates/pwrmgr/pwrmgr.core.tpl
@@ -12,6 +12,7 @@ filesets:
     depend:
       - ${instance_vlnv("lowrisc:ip:pwrmgr_pkg:0.1")}
       - ${instance_vlnv("lowrisc:ip:pwrmgr_reg:0.1")}
+      - lowrisc:ip:rom_ctrl_pkg
       - lowrisc:ip:rv_core_ibex_pkg
       - lowrisc:ip:pwrmgr_component
     file_type: systemVerilogSource

diff --git a/hw/ip_templates/pwrmgr/pwrmgr_pkg.core.tpl b/hw/ip_templates/pwrmgr/pwrmgr_pkg.core.tpl
@@ -9,12 +9,12 @@ virtual:
 
 filesets:
   files_rtl:
-    depend:
-      - ${instance_vlnv("lowrisc:ip:pwrmgr_reg")}
   % if wait_for_external_reset:
+    depend:
       - lowrisc:ip:rom_ctrl_pkg
   % endif
     files:
+      - rtl/pwrmgr_reg_pkg.sv
       - rtl/pwrmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/ip_templates/pwrmgr/pwrmgr_reg.core.tpl b/hw/ip_templates/pwrmgr/pwrmgr_reg.core.tpl
@@ -10,11 +10,11 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
       - lowrisc:ip:tlul
+      - ${instance_vlnv("lowrisc:ip:pwrmgr_pkg")}
       - lowrisc:prim:subreg
+      - lowrisc:tlul:headers
     files:
-      - rtl/pwrmgr_reg_pkg.sv
       - rtl/pwrmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/ip_templates/rstmgr/rstmgr_pkg.core.tpl b/hw/ip_templates/rstmgr/rstmgr_pkg.core.tpl
@@ -12,8 +12,9 @@ filesets:
     depend:
       - lowrisc:ip_interfaces:alert_handler_reg
       - lowrisc:ip_interfaces:pwrmgr_pkg
-      - ${instance_vlnv("lowrisc:ip:rstmgr_reg")}
+      - lowrisc:tlul:headers
     files:
+      - rtl/rstmgr_reg_pkg.sv
       - rtl/rstmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/ip_templates/rstmgr/rstmgr_reg.core.tpl b/hw/ip_templates/rstmgr/rstmgr_reg.core.tpl
@@ -10,9 +10,10 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
+      - lowrisc:ip:tlul
+      - lowrisc:prim:subreg
+      - ${instance_vlnv("lowrisc:ip:rstmgr_pkg")}
     files:
-      - rtl/rstmgr_reg_pkg.sv
       - rtl/rstmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_darjeeling/ip_autogen/clkmgr/clkmgr_pkg.core b/hw/top_darjeeling/ip_autogen/clkmgr/clkmgr_pkg.core
@@ -13,7 +13,9 @@ filesets:
       - lowrisc:constants:top_pkg
       - lowrisc:ip_interfaces:pwrmgr_pkg
       - lowrisc:prim:mubi
+      - lowrisc:tlul:headers
     files:
+      - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_darjeeling/ip_autogen/clkmgr/clkmgr_reg.core b/hw/top_darjeeling/ip_autogen/clkmgr/clkmgr_reg.core
@@ -10,9 +10,10 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
+      - lowrisc:ip:tlul
+      - lowrisc:prim:subreg
+      - lowrisc:opentitan:top_darjeeling_clkmgr_pkg
     files:
-      - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_darjeeling/ip_autogen/pinmux/pinmux_reg.core b/hw/top_darjeeling/ip_autogen/pinmux/pinmux_reg.core
@@ -10,6 +10,7 @@ virtual:
 filesets:
   files_rtl:
     depend:
+      - lowrisc:prim:subreg
       - lowrisc:tlul:headers
     files:
       - rtl/pinmux_reg_pkg.sv

diff --git a/hw/top_darjeeling/ip_autogen/pwrmgr/pwrmgr.core b/hw/top_darjeeling/ip_autogen/pwrmgr/pwrmgr.core
@@ -12,6 +12,7 @@ filesets:
     depend:
       - lowrisc:opentitan:top_darjeeling_pwrmgr_pkg:0.1
       - lowrisc:opentitan:top_darjeeling_pwrmgr_reg:0.1
+      - lowrisc:ip:rom_ctrl_pkg
       - lowrisc:ip:rv_core_ibex_pkg
       - lowrisc:ip:pwrmgr_component
     file_type: systemVerilogSource

diff --git a/hw/top_darjeeling/ip_autogen/pwrmgr/pwrmgr_pkg.core b/hw/top_darjeeling/ip_autogen/pwrmgr/pwrmgr_pkg.core
@@ -10,9 +10,9 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:opentitan:top_darjeeling_pwrmgr_reg
       - lowrisc:ip:rom_ctrl_pkg
     files:
+      - rtl/pwrmgr_reg_pkg.sv
       - rtl/pwrmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_darjeeling/ip_autogen/pwrmgr/pwrmgr_reg.core b/hw/top_darjeeling/ip_autogen/pwrmgr/pwrmgr_reg.core
@@ -10,11 +10,11 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
       - lowrisc:ip:tlul
+      - lowrisc:opentitan:top_darjeeling_pwrmgr_pkg
       - lowrisc:prim:subreg
+      - lowrisc:tlul:headers
     files:
-      - rtl/pwrmgr_reg_pkg.sv
       - rtl/pwrmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_darjeeling/ip_autogen/rstmgr/rstmgr_pkg.core b/hw/top_darjeeling/ip_autogen/rstmgr/rstmgr_pkg.core
@@ -12,8 +12,9 @@ filesets:
     depend:
       - lowrisc:ip_interfaces:alert_handler_reg
       - lowrisc:ip_interfaces:pwrmgr_pkg
-      - lowrisc:opentitan:top_darjeeling_rstmgr_reg
+      - lowrisc:tlul:headers
     files:
+      - rtl/rstmgr_reg_pkg.sv
       - rtl/rstmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_darjeeling/ip_autogen/rstmgr/rstmgr_reg.core b/hw/top_darjeeling/ip_autogen/rstmgr/rstmgr_reg.core
@@ -10,9 +10,10 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
+      - lowrisc:ip:tlul
+      - lowrisc:prim:subreg
+      - lowrisc:opentitan:top_darjeeling_rstmgr_pkg
     files:
-      - rtl/rstmgr_reg_pkg.sv
       - rtl/rstmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/clkmgr_pkg.core b/hw/top_earlgrey/ip_autogen/clkmgr/clkmgr_pkg.core
@@ -13,7 +13,9 @@ filesets:
       - lowrisc:constants:top_pkg
       - lowrisc:ip_interfaces:pwrmgr_pkg
       - lowrisc:prim:mubi
+      - lowrisc:tlul:headers
     files:
+      - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_earlgrey/ip_autogen/clkmgr/clkmgr_reg.core b/hw/top_earlgrey/ip_autogen/clkmgr/clkmgr_reg.core
@@ -10,9 +10,10 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
+      - lowrisc:ip:tlul
+      - lowrisc:prim:subreg
+      - lowrisc:opentitan:top_earlgrey_clkmgr_pkg
     files:
-      - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/flash_ctrl_prim_reg_top.core b/hw/top_earlgrey/ip_autogen/flash_ctrl/flash_ctrl_prim_reg_top.core
@@ -8,6 +8,7 @@ filesets:
   files_rtl:
     depend:
       - lowrisc:ip_interfaces:flash_ctrl_pkg
+      - lowrisc:prim:subreg
     files:
       - rtl/flash_ctrl_prim_reg_top.sv
     file_type: systemVerilogSource

diff --git a/hw/top_earlgrey/ip_autogen/flash_ctrl/flash_ctrl_reg.core b/hw/top_earlgrey/ip_autogen/flash_ctrl/flash_ctrl_reg.core
@@ -10,6 +10,7 @@ virtual:
 filesets:
   files_rtl:
     depend:
+      - lowrisc:prim:subreg
       - lowrisc:tlul:headers
     files:
       - rtl/flash_ctrl_reg_pkg.sv

diff --git a/hw/top_earlgrey/ip_autogen/pinmux/pinmux_reg.core b/hw/top_earlgrey/ip_autogen/pinmux/pinmux_reg.core
@@ -10,6 +10,7 @@ virtual:
 filesets:
   files_rtl:
     depend:
+      - lowrisc:prim:subreg
       - lowrisc:tlul:headers
     files:
       - rtl/pinmux_reg_pkg.sv

diff --git a/hw/top_earlgrey/ip_autogen/pwrmgr/pwrmgr.core b/hw/top_earlgrey/ip_autogen/pwrmgr/pwrmgr.core
@@ -12,6 +12,7 @@ filesets:
     depend:
       - lowrisc:opentitan:top_earlgrey_pwrmgr_pkg:0.1
       - lowrisc:opentitan:top_earlgrey_pwrmgr_reg:0.1
+      - lowrisc:ip:rom_ctrl_pkg
       - lowrisc:ip:rv_core_ibex_pkg
       - lowrisc:ip:pwrmgr_component
     file_type: systemVerilogSource

diff --git a/hw/top_earlgrey/ip_autogen/pwrmgr/pwrmgr_pkg.core b/hw/top_earlgrey/ip_autogen/pwrmgr/pwrmgr_pkg.core
@@ -9,9 +9,8 @@ virtual:
 
 filesets:
   files_rtl:
-    depend:
-      - lowrisc:opentitan:top_earlgrey_pwrmgr_reg
     files:
+      - rtl/pwrmgr_reg_pkg.sv
       - rtl/pwrmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_earlgrey/ip_autogen/pwrmgr/pwrmgr_reg.core b/hw/top_earlgrey/ip_autogen/pwrmgr/pwrmgr_reg.core
@@ -10,11 +10,11 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
       - lowrisc:ip:tlul
+      - lowrisc:opentitan:top_earlgrey_pwrmgr_pkg
       - lowrisc:prim:subreg
+      - lowrisc:tlul:headers
     files:
-      - rtl/pwrmgr_reg_pkg.sv
       - rtl/pwrmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_earlgrey/ip_autogen/rstmgr/rstmgr_pkg.core b/hw/top_earlgrey/ip_autogen/rstmgr/rstmgr_pkg.core
@@ -12,8 +12,9 @@ filesets:
     depend:
       - lowrisc:ip_interfaces:alert_handler_reg
       - lowrisc:ip_interfaces:pwrmgr_pkg
-      - lowrisc:opentitan:top_earlgrey_rstmgr_reg
+      - lowrisc:tlul:headers
     files:
+      - rtl/rstmgr_reg_pkg.sv
       - rtl/rstmgr_pkg.sv
     file_type: systemVerilogSource
 

diff --git a/hw/top_earlgrey/ip_autogen/rstmgr/rstmgr_reg.core b/hw/top_earlgrey/ip_autogen/rstmgr/rstmgr_reg.core
@@ -10,9 +10,10 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
+      - lowrisc:ip:tlul
+      - lowrisc:prim:subreg
+      - lowrisc:opentitan:top_earlgrey_rstmgr_pkg
     files:
-      - rtl/rstmgr_reg_pkg.sv
       - rtl/rstmgr_reg_top.sv
     file_type: systemVerilogSource
 

diff --git a/util/design/data/prim_mubi.core.tpl b/util/design/data/prim_mubi.core.tpl
@@ -16,8 +16,8 @@ filesets:
       - lowrisc:prim:assert
       - lowrisc:prim:buf
       - lowrisc:prim:flop
+      - lowrisc:prim:mubi_pkg
     files:
-      - rtl/prim_mubi_pkg.sv
 % for n in range(1, n_max_nibbles+1):
       - rtl/prim_mubi${4*n}_sender.sv
       - rtl/prim_mubi${4*n}_sync.sv