[ac_range_check] Add alert_status register

The DV environment needs to know the status of individual alerts, and a simple way to achieve this is by having an alert status register (like many other IPs do). Signed-off-by: Andreas Kurth <[email protected]>
lowRISC · Feb 24, 2025 · d4c5b97 · d4c5b97
1 parent 7843a57
commit d4c5b97
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Showing 10 changed files with 1,781 additions and 1,507 deletions.
diff --git a/hw/ip_templates/ac_range_check/data/ac_range_check.hjson.tpl b/hw/ip_templates/ac_range_check/data/ac_range_check.hjson.tpl
@@ -112,6 +112,46 @@ import math
   ]
   regwidth: "32"
   registers: [
+    { name: "ALERT_STATUS"
+      desc: "Status of hardware alerts."
+      swaccess: "ro"
+      hwaccess: "hwo"
+      fields: [
+        { bits: "0"
+          name: "SHADOWED_UPDATE_ERR"
+          resval: "0"
+          swaccess: "rc"
+          desc: '''Update error of a shadowed register.
+                   This is a recoverable error caused by SW misbehavior.
+                   This field gets cleared by a SW read.
+                '''
+        }
+        { bits: "1"
+          name: "SHADOWED_STORAGE_ERR"
+          resval: "0"
+          desc: '''Storage error of a shadowed register.
+                   This is a fatal error.
+                   Once set, this field remains set until this HW IP block gets reset.
+                '''
+        }
+        { bits: "2"
+          name: "REG_INTG_ERR"
+          resval: "0"
+          desc: '''Integrity error in the register interface.
+                   This is a fatal error.
+                   Once set, this field remains set until this HW IP block gets reset.
+                '''
+        }
+        { bits: "3"
+          name: "COUNTER_ERR"
+          resval: "0"
+          desc: '''Integrity error in a counter.
+                   This is a fatal error.
+                   Once set, this field remains set until this HW IP block gets reset.
+                '''
+        }
+      ]
+    }
     { name: "LOG_CONFIG"
       desc: ""
       swaccess: "rw"

diff --git a/hw/ip_templates/ac_range_check/rtl/ac_range_check.sv.tpl b/hw/ip_templates/ac_range_check/rtl/ac_range_check.sv.tpl
@@ -94,6 +94,15 @@ module ${module_instance_name}
     );
   end
 
+  assign hw2reg.alert_status.shadowed_storage_err.d = 1'b1;
+  assign hw2reg.alert_status.shadowed_storage_err.de = shadowed_storage_err;
+  assign hw2reg.alert_status.shadowed_update_err.d = 1'b1;
+  assign hw2reg.alert_status.shadowed_update_err.de = shadowed_update_err;
+  assign hw2reg.alert_status.reg_intg_err.d = 1'b1;
+  assign hw2reg.alert_status.reg_intg_err.de = reg_intg_error;
+  assign hw2reg.alert_status.counter_err.d = 1'b1;
+  assign hw2reg.alert_status.counter_err.de = deny_cnt_error;
+
   //////////////////////////////////////////////////////////////////////////////
   // Range Check Logic
   //////////////////////////////////////////////////////////////////////////////

diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson
@@ -9885,6 +9885,7 @@
             INTR_ENABLE: 2
             INTR_TEST: 2
             ALERT_TEST: 2
+            ALERT_STATUS: 2
             LOG_CONFIG: 2
             LOG_STATUS: 2
             LOG_ADDRESS: 2

diff --git a/hw/top_darjeeling/ip_autogen/ac_range_check/data/ac_range_check.hjson b/hw/top_darjeeling/ip_autogen/ac_range_check/data/ac_range_check.hjson
@@ -109,6 +109,46 @@
   ]
   regwidth: "32"
   registers: [
+    { name: "ALERT_STATUS"
+      desc: "Status of hardware alerts."
+      swaccess: "ro"
+      hwaccess: "hwo"
+      fields: [
+        { bits: "0"
+          name: "SHADOWED_UPDATE_ERR"
+          resval: "0"
+          swaccess: "rc"
+          desc: '''Update error of a shadowed register.
+                   This is a recoverable error caused by SW misbehavior.
+                   This field gets cleared by a SW read.
+                '''
+        }
+        { bits: "1"
+          name: "SHADOWED_STORAGE_ERR"
+          resval: "0"
+          desc: '''Storage error of a shadowed register.
+                   This is a fatal error.
+                   Once set, this field remains set until this HW IP block gets reset.
+                '''
+        }
+        { bits: "2"
+          name: "REG_INTG_ERR"
+          resval: "0"
+          desc: '''Integrity error in the register interface.
+                   This is a fatal error.
+                   Once set, this field remains set until this HW IP block gets reset.
+                '''
+        }
+        { bits: "3"
+          name: "COUNTER_ERR"
+          resval: "0"
+          desc: '''Integrity error in a counter.
+                   This is a fatal error.
+                   Once set, this field remains set until this HW IP block gets reset.
+                '''
+        }
+      ]
+    }
     { name: "LOG_CONFIG"
       desc: ""
       swaccess: "rw"

diff --git a/hw/top_darjeeling/ip_autogen/ac_range_check/doc/registers.md b/hw/top_darjeeling/ip_autogen/ac_range_check/doc/registers.md
diff --git a/hw/top_darjeeling/ip_autogen/ac_range_check/rtl/ac_range_check.sv b/hw/top_darjeeling/ip_autogen/ac_range_check/rtl/ac_range_check.sv
@@ -94,6 +94,15 @@ module ac_range_check
     );
   end
 
+  assign hw2reg.alert_status.shadowed_storage_err.d = 1'b1;
+  assign hw2reg.alert_status.shadowed_storage_err.de = shadowed_storage_err;
+  assign hw2reg.alert_status.shadowed_update_err.d = 1'b1;
+  assign hw2reg.alert_status.shadowed_update_err.de = shadowed_update_err;
+  assign hw2reg.alert_status.reg_intg_err.d = 1'b1;
+  assign hw2reg.alert_status.reg_intg_err.de = reg_intg_error;
+  assign hw2reg.alert_status.counter_err.d = 1'b1;
+  assign hw2reg.alert_status.counter_err.de = deny_cnt_error;
+
   //////////////////////////////////////////////////////////////////////////////
   // Range Check Logic
   //////////////////////////////////////////////////////////////////////////////