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[racl] Add generic RACL testplan #6492

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[racl] Add generic RACL testplan

[racl] Add generic RACL testplan #6492

Triggered via pull request February 24, 2025 15:02
@Razer6Razer6
synchronize #26326
Razer6:racl-testplan
Status Failure
Total duration 1h 46m 10s
Artifacts 31

ci.yml

on: pull_request
Lint (quick)
3m 23s
Lint (quick)
Earl Grey for CW340  /  Build bitstream
1m 57s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 19s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 16s
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 20s
Lint (slow)
Build documentation
5m 11s
Build documentation
Airgapped build
11m 5s
Airgapped build
Verible lint
1m 8s
Verible lint
Run OTBN smoke Test
2m 53s
Run OTBN smoke Test
Run OTBN crypto tests
3m 5s
Run OTBN crypto tests
Verilated English Breakfast
3m 24s
Verilated English Breakfast
Verilated Earl Grey
3m 29s
Verilated Earl Grey
CW305's Bitstream
2m 24s
CW305's Bitstream
Build Docker Containers
2m 39s
Build Docker Containers
Build and test software
29s
Build and test software
Build and test Darjeeling software
4m 3s
Build and test Darjeeling software
QEMU smoketest
2m 9s
QEMU smoketest
CW340 Test ROM Tests  /  FPGA test
2m 12s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
51s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
2m 16s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
2m 21s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
2m 18s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
2m 15s
CW340 Manufacturing Tests / FPGA test
Hyper310 ROM_EXT Tests  /  FPGA test
4m 12s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
4m 0s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
3m 37s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
3m 45s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
2m 11s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
4m 10s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
20s
Verify FPGA jobs
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Annotations

3 errors
Build and test software
Process completed with exit code 1.
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
58.2 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
55.6 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
32 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
6.94 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
45.8 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
38.1 KB
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
39.8 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
186 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
18.9 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.24 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.3 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
201 Bytes
verilated_englishbreakfast
7.02 MB
verilator_earlgrey-test-results
9 KB