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[sw,dice] Use simplified lifecycle_is_prod in CWT dice #6456

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[sw,dice] Use simplified lifecycle_is_prod in CWT dice

[sw,dice] Use simplified lifecycle_is_prod in CWT dice #6456

Triggered via pull request February 24, 2025 05:02
@sasdfsasdf
opened #26399
sasdf:mgTf994e1ad
Status Success
Total duration 25m 23s
Artifacts 31

ci.yml

on: pull_request
Lint (quick)
3m 27s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1m 41s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1m 49s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 5s
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 23s
Lint (slow)
Build documentation
5m 57s
Build documentation
Airgapped build
11m 41s
Airgapped build
Verible lint
1m 4s
Verible lint
Run OTBN smoke Test
2m 54s
Run OTBN smoke Test
Run OTBN crypto tests
3m 15s
Run OTBN crypto tests
Verilated English Breakfast
4m 7s
Verilated English Breakfast
Verilated Earl Grey
4m 43s
Verilated Earl Grey
CW305's Bitstream
2m 51s
CW305's Bitstream
Build Docker Containers
2m 31s
Build Docker Containers
Build and test software
19m 57s
Build and test software
Build and test Darjeeling software
3m 34s
Build and test Darjeeling software
QEMU smoketest
2m 15s
QEMU smoketest
Hyper310 ROM_EXT Tests  /  FPGA test
2m 12s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
2m 52s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
4m 42s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
2m 50s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
2m 3s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
49s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
2m 40s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
2m 18s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
2m 20s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
3m 0s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
2m 16s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
3m 54s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
20s
Verify FPGA jobs
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Annotations

3 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59.3 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
55.5 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
32.1 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
46.1 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.2 KB
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
39.4 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
188 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
20.1 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.27 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
43.9 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
78.8 KB
verilated_englishbreakfast
7.02 MB
verilator_earlgrey-test-results
9.12 KB