[toolchain] Enable LLD, LTO and minsize by default #6447
Triggered via pull request
February 23, 2025 20:44
pamaury
Status
Success
Total duration
2h 19m 10s
Artifacts
31
ci.yml
on: pull_request
Lint (quick)
3m 36s
Earl Grey for CW310 Hyperdebug
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Build bitstream
1h 7m
Lint (slow)
11m 0s
Build documentation
5m 35s
Airgapped build
11m 4s
Verible lint
1m 8s
Run OTBN smoke Test
2m 51s
Run OTBN crypto tests
2m 43s
Verilated English Breakfast
3m 45s
Verilated Earl Grey
1h 4m
CW305's Bitstream
2m 45s
Build Docker Containers
2m 38s
Build and test software
20m 18s
Build and test Darjeeling software
3m 59s
QEMU smoketest
2m 34s
Hyper310 ROM_EXT Tests
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FPGA test
15m 7s
CW310 SiVal Tests
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FPGA test
26m 34s
CW310 SiVal ROM_EXT Tests
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FPGA test
31m 55s
CW310 Manufacturing Tests
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FPGA test
27m 30s
CW310 Test ROM Tests
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FPGA test
3m 35s
CW310 ROM Tests
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FPGA test
36m 41s
CW340 Test ROM Tests
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FPGA test
4m 0s
CW340 ROM Tests
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FPGA test
45s
CW340 ROM_EXT Tests
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FPGA test
5m 31s
CW340 SiVal Tests
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FPGA test
17m 39s
CW340 SiVal ROM_EXT Tests
/
FPGA test
5m 15s
CW340 Manufacturing Tests
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FPGA test
39m 17s
Cache bitstreams to GCP
0s
Verify FPGA jobs
26s
Annotations
3 errors
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Verilated English Breakfast
Process completed with exit code 1.
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 1.
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Artifacts
Produced during runtime
| Name | Size | |
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chip_englishbreakfast_cw305
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1.38 MB |
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execute_manuf_fpga_tests_cw310-targets
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623 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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58.5 KB |
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execute_manuf_fpga_tests_cw340-targets
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594 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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56.2 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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598 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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31 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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427 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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7.03 KB |
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execute_rom_fpga_tests_cw310-targets
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1.73 KB |
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execute_rom_fpga_tests_cw310-test-results
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45.5 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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784 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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37.5 KB |
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execute_sival_fpga_tests_cw340-targets
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514 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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40.9 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.27 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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186 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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449 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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19.9 KB |
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execute_test_rom_fpga_tests_cw310-targets
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326 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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3.26 KB |
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execute_test_rom_fpga_tests_cw340-targets
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258 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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45.2 KB |
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partial-build-bin-chip_earlgrey_cw310
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5.99 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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5.99 MB |
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partial-build-bin-chip_earlgrey_cw340
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10 MB |
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sw_build_test-test-results
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247 KB |
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verilated_englishbreakfast
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7.02 MB |
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verilator_earlgrey-test-results
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9.06 KB |
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