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[toolchain] Enable LLD, LTO and minsize by default #6446

[toolchain] Enable LLD, LTO and minsize by default

[toolchain] Enable LLD, LTO and minsize by default #6446

Triggered via pull request February 23, 2025 16:25
Status Failure
Total duration 3h 17m 43s
Artifacts 29

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 5m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 29m
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 3m
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 43s
Lint (slow)
Build documentation
5m 13s
Build documentation
Airgapped build
10m 45s
Airgapped build
Verible lint
1m 5s
Verible lint
Run OTBN smoke Test
2m 46s
Run OTBN smoke Test
Run OTBN crypto tests
2m 50s
Run OTBN crypto tests
Verilated English Breakfast
3m 49s
Verilated English Breakfast
Verilated Earl Grey
57m 22s
Verilated Earl Grey
CW305's Bitstream
2m 22s
CW305's Bitstream
Build Docker Containers
2m 52s
Build Docker Containers
Build and test software
19m 28s
Build and test software
Build and test Darjeeling software
3m 54s
Build and test Darjeeling software
QEMU smoketest
2m 22s
QEMU smoketest
Hyper310 ROM_EXT Tests  /  FPGA test
2m 27s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
16m 1s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
3m 7s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
26m 49s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 17s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
50s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
6m 25s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
2m 49s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 27s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
36m 54s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
6m 5s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
37m 50s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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Annotations

8 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
CW310 SiVal ROM_EXT Tests / FPGA test
Process completed with exit code 36.
Hyper310 ROM_EXT Tests / FPGA test
Process completed with exit code 36.
CW310 SiVal Tests / FPGA test
The self-hosted runner: frank-Q_1_7PSP00424103 lost communication with the server. Verify the machine is running and has a healthy network connection. Anything in your workflow that terminates the runner process, starves it for CPU/Memory, or blocks its network access can cause this error.
CW340 SiVal Tests / FPGA test
Process completed with exit code 33.
Verify FPGA jobs
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59.8 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.6 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
201 Bytes
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
6.82 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
45.8 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
201 Bytes
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
201 Bytes
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
18.6 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.22 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.5 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
248 KB
verilated_englishbreakfast
7.02 MB
verilator_earlgrey-test-results
9.12 KB