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[hmac] D3 signoff #6388

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[hmac] D3 signoff

[hmac] D3 signoff #6388

Triggered via pull request February 21, 2025 09:52
@andrea-caforioandrea-caforio
synchronize #26294
andrea-caforio:hmac-d3-signoff
Status Success
Total duration 2h 36m 4s
Artifacts 31

ci.yml

on: pull_request
Lint (quick)
3m 19s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 7m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 3m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 40m
Earl Grey for CW340 / Build bitstream
Lint (slow)
11m 53s
Lint (slow)
Build documentation
5m 5s
Build documentation
Airgapped build
10m 37s
Airgapped build
Verible lint
1m 7s
Verible lint
Run OTBN smoke Test
2m 53s
Run OTBN smoke Test
Run OTBN crypto tests
2m 37s
Run OTBN crypto tests
Verilated English Breakfast
8m 9s
Verilated English Breakfast
Verilated Earl Grey
1h 13m
Verilated Earl Grey
CW305's Bitstream
24m 30s
CW305's Bitstream
Build Docker Containers
2m 16s
Build Docker Containers
Build and test software
19m 33s
Build and test software
Build and test Darjeeling software
3m 44s
Build and test Darjeeling software
QEMU smoketest
2m 19s
QEMU smoketest
Hyper310 ROM_EXT Tests  /  FPGA test
12m 52s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
25m 35s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
33m 19s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
30m 19s
CW310 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
4m 13s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
37m 24s
CW310 ROM Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
3m 29s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
51s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
5m 52s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
17m 38s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 36s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
37m 49s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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3 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
60.4 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
56.6 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
31.2 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.02 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
45.9 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.6 KB
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
41.1 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
186 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
19.8 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.21 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44.7 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
74 KB
verilated_englishbreakfast
7.02 MB
verilator_earlgrey-test-results
9.3 KB