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[sw] Change cert template engine to pre-generated method. #6382

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[sw] Change cert template engine to pre-generated method.

[sw] Change cert template engine to pre-generated method. #6382

Triggered via pull request February 21, 2025 02:50
@sasdfsasdf
synchronize #25957
sasdf:mgI11a10ca1
Status Success
Total duration 1h 6m 8s
Artifacts 31

ci.yml

on: pull_request
Lint (quick)
3m 38s
Lint (quick)
Earl Grey for CW340  /  Build bitstream
2m 45s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 43s
Earl Grey for CW310 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 49s
Earl Grey for CW310 Hyperdebug / Build bitstream
Lint (slow)
11m 21s
Lint (slow)
Build documentation
5m 17s
Build documentation
Airgapped build
12m 8s
Airgapped build
Verible lint
1m 5s
Verible lint
Run OTBN smoke Test
2m 46s
Run OTBN smoke Test
Run OTBN crypto tests
2m 45s
Run OTBN crypto tests
Verilated English Breakfast
3m 43s
Verilated English Breakfast
Verilated Earl Grey
1h 1m
Verilated Earl Grey
CW305's Bitstream
2m 50s
CW305's Bitstream
Build Docker Containers
2m 32s
Build Docker Containers
Build and test software
19m 51s
Build and test software
Build and test Darjeeling software
3m 28s
Build and test Darjeeling software
QEMU smoketest
2m 18s
QEMU smoketest
CW340 Test ROM Tests  /  FPGA test
2m 44s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
54s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
6m 40s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
18m 17s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
4m 26s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
34m 27s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
3m 28s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
34m 36s
CW310 ROM Tests / FPGA test
Hyper310 ROM_EXT Tests  /  FPGA test
13m 9s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
22m 33s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
27m 40s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
23m 8s
CW310 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
25s
Verify FPGA jobs
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3 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
59.4 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
55.7 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
32 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
6.94 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
45.8 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.3 KB
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
41 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
186 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
17.8 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.22 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
45.4 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
79.6 KB
verilated_englishbreakfast
7.03 MB
verilator_earlgrey-test-results
9.01 KB