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[hw,dma,rtl] Ability to swap the endianness of 32-byte digest words #6377

[hw,dma,rtl] Ability to swap the endianness of 32-byte digest words

[hw,dma,rtl] Ability to swap the endianness of 32-byte digest words #6377

Triggered via pull request February 20, 2025 18:21
Status Success
Total duration 6h 45m 29s
Artifacts 31

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 42s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
2m 31s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 33s
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 18s
Lint (slow)
Build documentation
5m 19s
Build documentation
Airgapped build
10m 35s
Airgapped build
Verible lint
1m 6s
Verible lint
Run OTBN smoke Test
2m 45s
Run OTBN smoke Test
Run OTBN crypto tests
4m 24s
Run OTBN crypto tests
Verilated English Breakfast
3m 42s
Verilated English Breakfast
Verilated Earl Grey
40m 11s
Verilated Earl Grey
CW305's Bitstream
2m 41s
CW305's Bitstream
Build Docker Containers
2m 32s
Build Docker Containers
Build and test software
18m 57s
Build and test software
Build and test Darjeeling software
3m 36s
Build and test Darjeeling software
QEMU smoketest
2m 23s
QEMU smoketest
Hyper310 ROM_EXT Tests  /  FPGA test
3m 12s
Hyper310 ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
3m 9s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
10m 51s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
3m 53s
CW310 Manufacturing Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
2m 28s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
55s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
3m 8s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
3m 3s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
3m 5s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
3m 48s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
2m 30s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
5m 9s
CW310 ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
25s
Verify FPGA jobs
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3 errors
Verilated English Breakfast
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.38 MB
execute_manuf_fpga_tests_cw310-targets
623 Bytes
execute_manuf_fpga_tests_cw310-test-results
61.2 KB
execute_manuf_fpga_tests_cw340-targets
594 Bytes
execute_manuf_fpga_tests_cw340-test-results
55.6 KB
execute_rom_ext_fpga_tests_cw310-targets
598 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
31.8 KB
execute_rom_ext_fpga_tests_cw340-targets
427 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
7.07 KB
execute_rom_fpga_tests_cw310-targets
1.73 KB
execute_rom_fpga_tests_cw310-test-results
46 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
784 Bytes
execute_sival_fpga_tests_cw310-test-results
37.8 KB
execute_sival_fpga_tests_cw340-targets
514 Bytes
execute_sival_fpga_tests_cw340-test-results
41.2 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.27 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
187 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
449 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
20.2 KB
execute_test_rom_fpga_tests_cw310-targets
326 Bytes
execute_test_rom_fpga_tests_cw310-test-results
3.26 KB
execute_test_rom_fpga_tests_cw340-targets
258 Bytes
execute_test_rom_fpga_tests_cw340-test-results
44.5 KB
partial-build-bin-chip_earlgrey_cw310
5.99 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
5.99 MB
partial-build-bin-chip_earlgrey_cw340
10 MB
sw_build_test-test-results
73.5 KB
verilated_englishbreakfast
7.03 MB
verilator_earlgrey-test-results
9.15 KB