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Backport 25533 to earlgrey 1.0.0 #5691

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Backport 25533 to earlgrey 1.0.0

Backport 25533 to earlgrey 1.0.0 #5691

Re-run triggered February 8, 2025 15:29
@github-actionsgithub-actions[bot]
#25669
a-will:backport-25533-to-earlgrey_1.0.0
Status Success
Total duration 2h 3m 13s
Artifacts 34

ci.yml

on: pull_request
Lint (quick)
3m 9s
Lint (quick)
Earl Grey for CW310  /  Build bitstream
1h 6m
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
1h 23m
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 8m
Earl Grey for CW310 Hyperdebug / Build bitstream
Lint (slow)
11m 42s
Lint (slow)
Build documentation
4m 45s
Build documentation
Airgapped build
13m 13s
Airgapped build
Verible lint
1m 4s
Verible lint
Run OTBN smoke Test
2m 48s
Run OTBN smoke Test
Run OTBN crypto tests
20m 0s
Run OTBN crypto tests
Verilated English Breakfast
8m 36s
Verilated English Breakfast
Verilated Earl Grey
1h 23m
Verilated Earl Grey
CW305's Bitstream
23m 7s
CW305's Bitstream
Build Docker Containers
3m 4s
Build Docker Containers
Build and test software
17m 55s
Build and test software
QEMU smoketest
2m 30s
QEMU smoketest
CW310 Test ROM Tests  /  FPGA test
5m 1s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
25m 45s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
5m 16s
CW310 ROM_EXT Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
57s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
59s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
58s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
4m 2s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
59s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
36m 20s
CW340 Manufacturing Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
28m 57s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
27m 59s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
27m 1s
CW310 Manufacturing Tests / FPGA test
Hyper310 ROM_EXT Tests  /  FPGA test
13m 0s
Hyper310 ROM_EXT Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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Annotations

2 errors
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 127.

Artifacts

Produced during runtime
Name Size
execute_manuf_fpga_tests_cw340-targets
579 Bytes
execute_manuf_fpga_tests_cw340-test-results
49.8 KB
execute_rom_ext_fpga_tests_cw340-targets
162 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
201 Bytes
execute_rom_fpga_tests_cw310-targets
1.81 KB
execute_rom_fpga_tests_cw310-test-results
44.7 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw340-targets
281 Bytes
execute_sival_fpga_tests_cw340-test-results
3.4 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
162 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
201 Bytes
execute_test_rom_fpga_tests_cw340-targets
162 Bytes
execute_test_rom_fpga_tests_cw340-test-results
201 Bytes
partial-build-bin-chip_earlgrey_cw340
9.89 MB