[ipgen,topgen] Uniquify VLNVs and reorganize core hierarchies #3987
Triggered via pull request
January 4, 2025 17:22
a-will
Status
Success
Total duration
2h 16m 59s
Artifacts
31
ci.yml
on: pull_request
Lint (quick)
3m 13s
Earl Grey for CW310 Hyperdebug
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Build bitstream
1h 9m
Lint (slow)
11m 18s
Build documentation
5m 30s
Airgapped build
8m 24s
Verible lint
1m 11s
Run OTBN smoke Test
2m 45s
Run OTBN crypto tests
21m 9s
Verilated English Breakfast
9m 6s
Verilated Earl Grey
1h 16m
CW305's Bitstream
25m 19s
Build Docker Containers
2m 35s
Build and test software
19m 9s
CW340 Test ROM Tests
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FPGA test
4m 22s
CW340 ROM Tests
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FPGA test
49s
CW340 ROM_EXT Tests
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FPGA test
7m 0s
CW340 SiVal Tests
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FPGA test
17m 0s
CW340 SiVal ROM_EXT Tests
/
FPGA test
4m 21s
CW340 Manufacturing Tests
/
FPGA test
41m 20s
CW310 ROM_EXT Tests
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FPGA test
9m 58s
CW310 SiVal Tests
/
FPGA test
29m 5s
CW310 SiVal ROM_EXT Tests
/
FPGA test
39m 17s
CW310 Manufacturing Tests
/
FPGA test
35m 8s
CW310 Test ROM Tests
/
FPGA test
6m 35s
CW310 ROM Tests
/
FPGA test
45m 53s
Cache bitstreams to GCP
0s
Verify FPGA jobs
24s
Annotations
8 errors
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Countermeasure check failed.
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Process completed with exit code 1.
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Some target names have banned characters.
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Process completed with exit code 1.
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Process completed with exit code 1.
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Countermeasure check failed.
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 1.
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Artifacts
Produced during runtime
| Name | Size | |
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chip_englishbreakfast_cw305
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1.39 MB |
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execute_manuf_fpga_tests_cw310-targets
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623 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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59.4 KB |
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execute_manuf_fpga_tests_cw340-targets
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594 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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55.7 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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519 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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12.7 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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437 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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7.14 KB |
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execute_rom_fpga_tests_cw310-targets
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1.76 KB |
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execute_rom_fpga_tests_cw310-test-results
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47.3 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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784 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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37.3 KB |
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execute_sival_fpga_tests_cw340-targets
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502 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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39.6 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.21 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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182 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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435 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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18.4 KB |
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execute_test_rom_fpga_tests_cw310-targets
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326 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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3.25 KB |
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execute_test_rom_fpga_tests_cw340-targets
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258 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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45.1 KB |
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partial-build-bin-chip_earlgrey_cw310
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6.03 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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6 MB |
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partial-build-bin-chip_earlgrey_cw340
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9.91 MB |
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sw_build_test-test-results
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75.4 KB |
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verilated_englishbreakfast
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7.04 MB |
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verilator_earlgrey-test-results
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8.88 KB |
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