Skip to content

[dv] Add ROT_AUTH configuration test. #3631

[dv] Add ROT_AUTH configuration test.

[dv] Add ROT_AUTH configuration test. #3631

Triggered via pull request December 18, 2024 23:45
Status Failure
Total duration 1h 52m 50s
Artifacts 33

ci.yml

on: pull_request
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 3s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
2m 4s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 1s
Earl Grey for CW310 / Build bitstream
Lint (slow)
6m 56s
Lint (slow)
Build documentation
4m 16s
Build documentation
Airgapped build
12m 21s
Airgapped build
Verible lint
1m 9s
Verible lint
Run OTBN smoke Test
2m 25s
Run OTBN smoke Test
Run OTBN crypto tests
20m 7s
Run OTBN crypto tests
Verilated English Breakfast
7m 41s
Verilated English Breakfast
Verilated Earl Grey
1h 27m
Verilated Earl Grey
CW305's Bitstream
21m 10s
CW305's Bitstream
Build Docker Containers
2m 52s
Build Docker Containers
Build and test software
12m 34s
Build and test software
CW310 SiVal Tests  /  FPGA test
30m 30s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
33m 26s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
32m 0s
CW310 Manufacturing Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
13m 44s
CW310 ROM_EXT Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
58s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
47s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
46s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
3m 55s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
56s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
8m 44s
CW340 Manufacturing Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
4m 44s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
27m 16s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
4m 51s
CW310 ROM_EXT Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
27s
Verify FPGA jobs
Fit to window
Zoom out
Zoom in

Annotations

3 errors
Lint (slow)
Process completed with exit code 3.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 127.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.34 MB
execute_fpga_rom_ext_tests_cw310-targets
618 Bytes
execute_fpga_rom_ext_tests_cw310-test-results
48.7 KB
execute_manuf_fpga_tests_cw310-targets
655 Bytes
execute_manuf_fpga_tests_cw310-test-results
81.3 KB
execute_manuf_fpga_tests_cw340-targets
291 Bytes
execute_manuf_fpga_tests_cw340-test-results
28.7 KB
execute_rom_ext_fpga_tests_cw310-targets
325 Bytes
execute_rom_ext_fpga_tests_cw310-test-results
2.56 KB
execute_rom_ext_fpga_tests_cw340-targets
162 Bytes
execute_rom_ext_fpga_tests_cw340-test-results
201 Bytes
execute_rom_fpga_tests_cw310-targets
1.8 KB
execute_rom_fpga_tests_cw310-test-results
44.6 KB
execute_rom_fpga_tests_cw340-targets
162 Bytes
execute_rom_fpga_tests_cw340-test-results
201 Bytes
execute_sival_fpga_tests_cw310-targets
931 Bytes
execute_sival_fpga_tests_cw310-test-results
70.3 KB
execute_sival_fpga_tests_cw340-targets
260 Bytes
execute_sival_fpga_tests_cw340-test-results
2.65 KB
execute_sival_rom_ext_fpga_tests_cw310-targets
2.39 KB
execute_sival_rom_ext_fpga_tests_cw310-test-results
178 KB
execute_sival_rom_ext_fpga_tests_cw340-targets
162 Bytes
execute_sival_rom_ext_fpga_tests_cw340-test-results
201 Bytes
execute_test_rom_fpga_tests_cw310-targets
372 Bytes
execute_test_rom_fpga_tests_cw310-test-results
52.7 KB
execute_test_rom_fpga_tests_cw340-targets
162 Bytes
execute_test_rom_fpga_tests_cw340-test-results
201 Bytes
partial-build-bin-chip_earlgrey_cw310
6 MB
partial-build-bin-chip_earlgrey_cw310_hyperdebug
6.05 MB
partial-build-bin-chip_earlgrey_cw340
9.68 MB
sw_build_test-test-results
59.1 KB
verilated_englishbreakfast
6.36 MB
verilator_earlgrey-test-results
9.02 KB