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[dv] Add ROT_AUTH configuration test. #3630

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[dv] Add ROT_AUTH configuration test.

[dv] Add ROT_AUTH configuration test. #3630

Triggered via pull request December 18, 2024 23:29
@moidxmoidx
opened #25704
moidx:a1-otp-gls-test
Status Cancelled
Total duration 15m 42s
Artifacts 2

ci.yml

on: pull_request
Lint (quick)
3m 20s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
0s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
0s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
0s
Earl Grey for CW310 / Build bitstream
Lint (slow)
6m 46s
Lint (slow)
Build documentation
4m 31s
Build documentation
Airgapped build
12m 3s
Airgapped build
Verible lint
1m 1s
Verible lint
Run OTBN smoke Test
2m 29s
Run OTBN smoke Test
Run OTBN crypto tests
12m 4s
Run OTBN crypto tests
Verilated English Breakfast
7m 46s
Verilated English Breakfast
Verilated Earl Grey
12m 4s
Verilated Earl Grey
CW305's Bitstream
0s
CW305's Bitstream
Build Docker Containers
2m 40s
Build Docker Containers
Build and test software
11m 36s
Build and test software
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
0s
Verify FPGA jobs
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Annotations

13 errors
Lint (slow)
Process completed with exit code 3.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 127.
CW305's Bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Earl Grey for CW340 / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Earl Grey for CW310 / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Earl Grey for CW310 Hyperdebug / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Airgapped build
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Airgapped build
The operation was canceled.
Verilated Earl Grey
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Verilated Earl Grey
The operation was canceled.
Run OTBN crypto tests
Canceling since a higher priority waiting request for 'CI-refs/pull/25704/merge' exists
Run OTBN crypto tests
The operation was canceled.

Artifacts

Produced during runtime
Name Size
sw_build_test-test-results
58.8 KB
verilated_englishbreakfast
6.36 MB