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Update (2024.04.26, 2nd)
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34058: LA port of 8322122: Enhance generation of addresses
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loongson-jvm authored Apr 26, 2024
1 parent af76bcb commit c53840e
Showing 1 changed file with 5 additions and 3 deletions.
8 changes: 5 additions & 3 deletions src/hotspot/cpu/loongarch/c1_LIRGenerator_loongarch_64.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2005, 2021, Oracle and/or its affiliates. All rights reserved.
* Copyright (c) 2021, 2022, Loongson Technology. All rights reserved.
* Copyright (c) 2021, 2024, Loongson Technology. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
Expand Down Expand Up @@ -157,8 +157,10 @@ LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
if (index->is_register()) {
// apply the shift and accumulate the displacement
if (shift > 0) {
LIR_Opr tmp = new_pointer_register();
__ shift_left(index, shift, tmp);
// Use long register to avoid overflow when shifting large index values left.
LIR_Opr tmp = new_register(T_LONG);
__ convert(Bytecodes::_i2l, index, tmp);
__ shift_left(tmp, shift, tmp);
index = tmp;
}
if (large_disp != 0) {
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