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Lowering neon vqadd_v and add buildCommonNeonBuiltinExpr
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ghehg committed Sep 26, 2024
1 parent 52323c1 commit 035f3bf
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Showing 3 changed files with 63 additions and 4 deletions.
3 changes: 3 additions & 0 deletions clang/include/clang/CIR/MissingFeatures.h
Original file line number Diff line number Diff line change
Expand Up @@ -136,6 +136,9 @@ struct MissingFeatures {
// AArch64 Neon builtin related.
static bool buildNeonShiftVector() { return false; }

// ABIInfo queries.
static bool allowBFloatArgsAndRet() { return false; }

// Misc
static bool cacheRecordLayouts() { return false; }
static bool capturedByInit() { return false; }
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59 changes: 55 additions & 4 deletions clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1603,7 +1603,7 @@ static mlir::Value buildArmLdrexNon128Intrinsic(unsigned int builtinID,

mlir::Value buildNeonCall(unsigned int builtinID, CIRGenFunction &cgf,
llvm::SmallVector<mlir::Type> argTypes,
llvm::SmallVector<mlir::Value, 4> args,
llvm::SmallVectorImpl<mlir::Value> &args,
llvm::StringRef intrinsicName, mlir::Type funcResTy,
mlir::Location loc,
bool isConstrainedFPIntrinsic = false,
Expand Down Expand Up @@ -1640,6 +1640,55 @@ mlir::Value buildNeonCall(unsigned int builtinID, CIRGenFunction &cgf,
}
}

mlir::Value CIRGenFunction::buildCommonNeonBuiltinExpr(
unsigned builtinID, unsigned llvmIntrinsic, unsigned altLLVMIntrinsic,
const char *nameHint, unsigned modifier, const CallExpr *e,
llvm::SmallVectorImpl<mlir::Value> &ops, cir::Address ptrOp0,
cir::Address ptrOp1, llvm::Triple::ArchType arch) {
// Get the last argument, which specifies the vector type.
const clang::Expr *arg = e->getArg(e->getNumArgs() - 1);
std::optional<llvm::APSInt> neonTypeConst =
arg->getIntegerConstantExpr(getContext());
if (!neonTypeConst)
return nullptr;

// Determine the type of this overloaded NEON intrinsic.
NeonTypeFlags neonType(neonTypeConst->getZExtValue());
bool isUnsigned = neonType.isUnsigned();
bool isQuad = neonType.isQuad();
const bool hasLegalHalfType = getTarget().hasLegalHalfType();
assert(!MissingFeatures::allowBFloatArgsAndRet());
// The value of allowBFloatArgsAndRet is true for AArch64, but it should
// come from ABI info.
const bool allowBFloatArgsAndRet = true;

mlir::Type vTy = GetNeonType(this, neonType, hasLegalHalfType, false,
allowBFloatArgsAndRet);
if (!vTy)
return nullptr;

unsigned intrinicId = llvmIntrinsic;
if ((modifier & UnsignedAlts) && !isUnsigned)
intrinicId = altLLVMIntrinsic;

switch (builtinID) {
default:
llvm_unreachable("NYI");
case NEON::BI__builtin_neon_vqadd_v:
mlir::Value res = buildNeonCall(builtinID, *this, {vTy, vTy}, ops,
(intrinicId != altLLVMIntrinsic)
? "llvm.aarch64.neon.uqadd"
: "llvm.aarch64.neon.sqadd",
vTy, getLoc(e->getExprLoc()));
mlir::Type resultType = ConvertType(e->getType());
// AArch64 intrinsic one-element vector type cast to
// scalar type expected by the builtin
return builder.createBitcast(res, resultType);
break;
}
return nullptr;
}

mlir::Value
CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
ReturnValueSlot ReturnValue,
Expand Down Expand Up @@ -2352,9 +2401,11 @@ CIRGenFunction::buildAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
// defer to common code if it's been added to our special map.
Builtin = findARMVectorIntrinsicInMap(AArch64SIMDIntrinsicMap, BuiltinID,
AArch64SIMDIntrinsicsProvenSorted);
if (Builtin) {
llvm_unreachable("NYI");
}
if (Builtin)
return buildCommonNeonBuiltinExpr(
Builtin->BuiltinID, Builtin->LLVMIntrinsic, Builtin->AltLLVMIntrinsic,
Builtin->NameHint, Builtin->TypeModifier, E, Ops,
/*never use addresses*/ Address::invalid(), Address::invalid(), Arch);

if (mlir::Value V =
buildAArch64TblBuiltinExpr(*this, BuiltinID, E, Ops, Arch))
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5 changes: 5 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenFunction.h
Original file line number Diff line number Diff line change
Expand Up @@ -980,6 +980,11 @@ class CIRGenFunction : public CIRGenTypeCache {
mlir::Value buildARMCDEBuiltinExpr(unsigned BuiltinID, const CallExpr *E,
ReturnValueSlot ReturnValue,
llvm::Triple::ArchType Arch);
mlir::Value buildCommonNeonBuiltinExpr(
unsigned builtinID, unsigned llvmIntrinsic, unsigned altLLVMIntrinsic,
const char *nameHint, unsigned modifier, const CallExpr *e,
llvm::SmallVectorImpl<mlir::Value> &ops, cir::Address ptrOp0,
cir::Address ptrOp1, llvm::Triple::ArchType arch);

mlir::Value buildAlignmentAssumption(mlir::Value ptrValue, QualType ty,
SourceLocation loc,
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