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Optimize Memoro by ignoring load/stores that reference alloca regions.

zmodem and others added 30 commits August 1, 2018 13:29
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r338658 | nemanjai | 2018-08-02 02:03:22 +0200 (Thu, 02 Aug 2018) | 13 lines

[PowerPC] Do not round values prior to converting to integer

Adding the FP_ROUND nodes when combining FP_TO_[SU]INT of elements
feeding a BUILD_VECTOR into an FP_TO_[SU]INT of the built vector
loses precision. This patch removes the code that adds these nodes
to true f64 operands. It also adds patterns required to ensure
the code is still vectorized rather than converting individual
elements and inserting into a vector.

Fixes https://bugs.llvm.org/show_bug.cgi?id=38342

Differential Revision: https://reviews.llvm.org/D50121

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r338682 | hans | 2018-08-02 10:10:34 +0200 (Thu, 02 Aug 2018) | 1 line

utils/release/tag.sh: add debuginfo-tests to project list
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r338554 | bryanpkc | 2018-08-01 15:50:29 +0200 (Wed, 01 Aug 2018) | 11 lines

[AArch64] Fix FCCMP with FP16 operands

Summary: This patch adds support for FCCMP instruction with FP16 operands, avoiding an assertion during instruction selection.

Reviewers: olista01, SjoerdMeijer, t.p.northover, javed.absar

Reviewed By: SjoerdMeijer

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D50115
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r338703 | bd1976llvm | 2018-08-02 13:27:38 +0200 (Thu, 02 Aug 2018) | 8 lines

[llvm-ar] Correct help text

Corrected and simplified the help text.

It was clearly too difficult to maintain before (see e.g. @227296) making it
simpler and more consistent it should help people keep it up to date.

Differential Revision: https://reviews.llvm.org/D48577
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r338709 | bd1976llvm | 2018-08-02 14:27:01 +0200 (Thu, 02 Aug 2018) | 3 lines

[llvm-ar] Fix help text test. NFC.

Missed from @338703
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r338751 | tstellar | 2018-08-02 20:16:10 +0200 (Thu, 02 Aug 2018) | 13 lines

CMake: Remove LLVM_DYLIB_SYMBOL_VERSIONING

Summary:
This option is no longer needed since r300496 added symbol
versioning by default

Reviewers: sylvestre.ledru, beanz, mgorny

Reviewed By: mgorny

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D49835
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r338762 | gbiv | 2018-08-02 21:50:27 +0200 (Thu, 02 Aug 2018) | 15 lines

[Support] Add an enable bit to our DebugCounters

r337748 made us start incrementing DebugCounters all of the time. This
makes tsan unhappy in multithreaded environments.

Since it doesn't make much sense to use DebugCounters with multiple
threads, this patch makes us only count anything if the user passed a
-debug-counter option or if some other piece of code explicitly asks
for it (e.g. the pass in D50031).

The amount of global state here makes writing a unittest for this
behavior somewhat awkward. So, no test is provided.

Differential Revision: https://reviews.llvm.org/D50150

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r338599 | vlad.tsyrklevich | 2018-08-01 19:44:37 +0200 (Wed, 01 Aug 2018) | 16 lines

[X86] FastISel fall back on !absolute_symbol GVs

Summary:
D25878, which added support for !absolute_symbol for normal X86 ISel,
did not add support for materializing references to absolute symbols for
X86 FastISel. This causes build failures because FastISel generates
PC-relative relocations for absolute symbols. Fall back to normal ISel
for references to !absolute_symbol GVs. Fix for PR38200.

Reviewers: pcc, craig.topper

Reviewed By: pcc

Subscribers: hiraditya, llvm-commits, kcc

Differential Revision: https://reviews.llvm.org/D50116
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r338817 | inouehrs | 2018-08-03 07:39:48 +0200 (Fri, 03 Aug 2018) | 10 lines

[InstSimplify] fold extracting from std::pair (2/2)

This is the second patch of the series which intends to enable jump threading for an inlined method whose return type is std::pair<int, bool> or std::pair<bool, int>. 
The first patch is https://reviews.llvm.org/rL338485.

This patch handles code sequences that merges two values using `shl` and `or`, then extracts one value using `and`.

Differential Revision: https://reviews.llvm.org/D49981


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r338665 | lliu0 | 2018-08-02 03:54:12 +0200 (Thu, 02 Aug 2018) | 11 lines

Fix FCOPYSIGN expansion

In expansion of FCOPYSIGN, the shift node is missing when the two
operands of FCOPYSIGN are of the same size. We should always generate
shift node (if the required shift bit is not zero) to put the sign
bit into the right position, regardless of the size of underlying
types.

Differential Revision: https://reviews.llvm.org/D49973


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r338968 | echristo | 2018-08-05 16:23:37 +0200 (Sun, 05 Aug 2018) | 6 lines

Revert "Add a warning if someone attempts to add extra section flags to sections"

There are a bunch of edge cases and inconsistencies in how we're emitting sections
cause this warning to fire and it needs more work.

This reverts commit r335558.
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r338569 | jvesely | 2018-08-01 17:04:36 +0200 (Wed, 01 Aug 2018) | 5 lines

AMDGPU: Allow fp32-denormals feature for r600 targets

This was accidentally removed in r335942.

Differential Revision: https://reviews.llvm.org/D49934
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r338610 | jvesely | 2018-08-01 20:36:07 +0200 (Wed, 01 Aug 2018) | 3 lines

AMDGPU/R600: Convert kernel param loads to use PARAM_I_ADDRESS

Non ext aligned i32 loads are still optimized to use CONSTANT_BUFFER (AS 8)
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r338915 | ctopper | 2018-08-03 22:14:18 +0200 (Fri, 03 Aug 2018) | 5 lines

[SelectionDAG] Teach LegalizeVectorTypes to widen the mask input to a masked store.

The mask operand is visited before the data operand so we need to be able to widen it.

Fixes PR38436.
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r338716 | spatel | 2018-08-02 15:46:20 +0200 (Thu, 02 Aug 2018) | 41 lines

[ValueTracking] fix maxnum miscompile for cannotBeOrderedLessThanZero (PR37776)

This adds the NAN checks suggested in PR37776:
https://bugs.llvm.org/show_bug.cgi?id=37776

If both operands to maxnum are NAN, that should get constant folded, so we don't 
have to handle that case. This is the same assumption as other FP ops in this
function. Returning 'false' is always conservatively correct.

Copying from the bug report:

Currently, we have this for "when is cannotBeOrderedLessThanZero 
(mustBePositiveOrNaN) true for maxnum":
               L
        -------------------
        | Pos | Neg | NaN |
   ------------------------
   |Pos |  x  |  x  |  x  |
   ------------------------
 R |Neg |  x  |     |  x  |
   ------------------------
   |NaN |  x  |  x  |  x  |
   ------------------------


The cases with (Neg & NaN) are wrong. We should have:

                L
        -------------------
        | Pos | Neg | NaN |
   ------------------------
   |Pos |  x  |  x  |  x  |
   ------------------------
 R |Neg |  x  |     |     |
   ------------------------
   |NaN |  x  |     |  x  |
   ------------------------

Differential Revision: https://reviews.llvm.org/D50081


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r339190 | jvesely | 2018-08-07 23:54:37 +0200 (Tue, 07 Aug 2018) | 12 lines

AMDGPU: Remove broken i16 ternary patterns

Fixup test to check for GCN prefix
These patterns always zero extend the result even though it might need sign extension.
This has been broken since the addition of i16 support.
It has popped up in mad_sat(char) test since min(max()) combination is turned into v_med3, resulting in the following (incorrect) sequence:
        v_mad_i16 v2, v10, v9, v11
        v_med3_i32 v2, v2, v8, v7

Fixes mad_sat(char) piglit on VI.

Differential Revision: https://reviews.llvm.org/D49836
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r338902 | jgalenson | 2018-08-03 19:12:23 +0200 (Fri, 03 Aug 2018) | 5 lines

Fix crash in bounds checking.

In r337830 I added SCEV checks to enable us to insert fewer bounds checks.  Unfortunately, this sometimes crashes when multiple bounds checks are added due to SCEV caching issues.  This patch splits the bounds checking pass into two phases, one that computes all the conditions (using SCEV checks) and the other that adds the new instructions.

Differential Revision: https://reviews.llvm.org/D49946
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r339319 | hans | 2018-08-09 10:41:03 +0200 (Thu, 09 Aug 2018) | 1 line

cmake: don't pack system libs unless CMAKE_INSTALL_UCRT_LIBRARIES is set (PR38476)
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r339316 | hahnfeld | 2018-08-09 09:45:49 +0200 (Thu, 09 Aug 2018) | 16 lines

[NVPTX] Select atomic loads and stores

According to PTX ISA .volatile has the same memory synchronization
semantics as .relaxed.sys, so it can be used to implement monotonic
atomic loads and stores. This is important for OpenMP's atomic
construct where
 - 'read's and 'write's are lowered to atomic loads and stores, and
 - an update of float or double types are lowered into a cmpxchg loop.
(Note that PTX could do better because it has atom.add.f{32,64} but
LLVM's atomicrmw instruction only allows integer types.)

Higher levels of atomicity (like acquire and release) need additional
synchronization properties which were added with PTX ISA 6.0 / sm_70.
So using these instructions still results in an error.

Differential Revision: https://reviews.llvm.org/D50391
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This updates the 7.0 branch release notes to mention the SystemZ
specific changes, and also the new support for multi-alternative
patterns in TableGen (see D48545).

Reviewed by: hans
Differential Revision: https://reviews.llvm.org/D50514



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r339225 | thopre | 2018-08-08 11:35:26 +0200 (Wed, 08 Aug 2018) | 11 lines

Support inline asm with multiple 64bit output in 32bit GPR

Summary: Extend fix for PR34170 to support inline assembly with multiple output operands that do not naturally go in the register class it is constrained to (eg. double in a 32-bit GPR as in the PR).

Reviewers: bogner, t.p.northover, lattner, javed.absar, efriedma

Reviewed By: efriedma

Subscribers: efriedma, tra, eraman, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D45437
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r339073 | stella.stamenova | 2018-08-07 00:37:44 +0200 (Tue, 07 Aug 2018) | 14 lines

[lit, python] Always add quotes around the python path in lit

Summary:
The issue with the python path is that the path to python on Windows can contain spaces. To make the tests always work, the path to python needs to be surrounded by quotes.

This change updates several configuration files which specify the path to python as a substitution and also remove quotes from existing tests.

Reviewers: asmith, zturner, alexshap, jakehehrlich

Reviewed By: zturner, alexshap, jakehehrlich

Subscribers: mehdi_amini, nemanjai, eraman, kbarton, jakehehrlich, steven_wu, dexonsmith, stella.stamenova, delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D50206
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r339179 | stella.stamenova | 2018-08-07 22:54:38 +0200 (Tue, 07 Aug 2018) | 12 lines

[lit, python3] Update lit error logging to work correctly in python3 and other test fixes

Summary:
In Python2 'unicode' is a distinct type from 'str', but in Python3 'unicode' does not exist and instead all 'str' objects are Unicode string. This change updates the logic in the test logging for lit to correctly process each of the types, and more importantly, to not just fail in Python3.

This change also reverses the use of quotes in several of the cfg files. By using '""' we are guaranteeing that the resulting path will work correctly on Windows while "''" only works correctly sometimes. This also fixes one of the failing tests.

Reviewers: asmith, zturner

Subscribers: stella.stamenova, delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D50397
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r339184 | stella.stamenova | 2018-08-07 23:21:30 +0200 (Tue, 07 Aug 2018) | 3 lines

[lit] Disable shtest-timeout on Windows

This test passes on Windows when using Python 3 but fails when using Python 2, so it needs more investigation before it can be enabled as the bots use Python 2.
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r339492 | tstellar | 2018-08-11 03:08:34 +0200 (Sat, 11 Aug 2018) | 9 lines

[gold] Fix Tests cases on i686

Reviewers: tejohnson

Reviewed By: tejohnson

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D50583
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r339411 | gbiv | 2018-08-10 07:14:43 +0200 (Fri, 10 Aug 2018) | 17 lines

[MemorySSA] "Fix" lifetime intrinsic handling

MemorySSA currently creates MemoryAccesses for lifetime intrinsics, and
sometimes treats them as clobbers. This may/may not be the best way
forward, but while we're doing it, we should consider
MayAlias/PartialAlias to be clobbers.

The ideal fix here is probably to remove all of this reasoning about
lifetimes from MemorySSA + put it into the passes that need to care. But
that's a wayyy broader fix that needs some consensus, and we have
miscompiles + a release branch today, and this should solve the
miscompiles just as well.

differential revision is D43269. Landing without an explicit LGTM (and
without using the special please-autoclose-this syntax) so we can still
use that revision as a place to decide what the right fix here is.

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zmodem and others added 30 commits September 4, 2018 09:21
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r341244 | tstellar | 2018-08-31 22:15:31 +0200 (Fri, 31 Aug 2018) | 11 lines

lit: Use sys.executable for executing builtin commands

Summary:
The python executable may not exist on all systems so use sys.executable
instead.

Reviewers: ddunbar, stella.stamenova

Subscribers: delcypher, llvm-commits

Differential Revision: https://reviews.llvm.org/D51511
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r340959 | mareko | 2018-08-29 22:03:00 +0200 (Wed, 29 Aug 2018) | 9 lines

AMDGPU: Handle 32-bit address wraparounds for SMRD opcodes

Summary: This fixes GPU hangs with OpenGL bindless handle arithmetic.

Reviewers: arsenm, nhaehnle

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D51203
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Patch by Lei Huang!


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r341416 | annat | 2018-09-05 00:12:23 +0200 (Wed, 05 Sep 2018) | 11 lines

[LV] First order recurrence phis should not be treated as uniform

This is fix for PR38786.
First order recurrence phis were incorrectly treated as uniform,
which caused them to be vectorized as uniform instructions.

Patch by Ayal Zaks and Orivej Desh!

Reviewed by: Anna

Differential Revision: https://reviews.llvm.org/D51639
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r341512 | ctopper | 2018-09-06 04:03:14 +0200 (Thu, 06 Sep 2018) | 7 lines

[X86][Assembler] Allow %eip as a register in 32-bit mode for .cfi directives.

This basically reverts a change made in r336217, but improves the text of the error message for not allowing IP-relative addressing in 32-bit mode.

Fixes PR38826.

Patch by Iain Sandoe.
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r341642 | tnorthover | 2018-09-07 11:21:25 +0200 (Fri, 07 Sep 2018) | 8 lines

ARM: fix Thumb2 CodeGen for ldrex with folded frame-index.

Because t2LDREX (& t2STREX) were marked as AddrModeNone, but did allow a
FrameIndex operand, rewriteT2FrameIndex asserted. This gives them a
proper addressing-mode and tells the rewriter about it so that encodable
offsets are exploited and others are rejected.

Should fix PR38828.
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r343347 | cmatthews | 2018-09-28 10:55:18 -0700 (Fri, 28 Sep 2018) | 4 lines

make lit builtins a package

cat.py is not being installed when lit is installed from source. So
tests that use the internal shell fail when using cat.
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r343443 | ctopper | 2018-10-01 00:08:41 -0700 (Mon, 01 Oct 2018) | 9 lines

[X86] Stop X86DomainReassignment from creating copies between GR8/GR16 physical registers and k-registers.

We can only copy between a k-register and a GR32/GR64 register.

This patch detects that the copy will be illegal and prevents the domain reassignment from happening for that closure.

This probably isn't the best fix, and we should probably figure out how to handle this correctly.

Fixes PR38803.
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r343428 | ctopper | 2018-09-30 16:43:30 -0700 (Sun, 30 Sep 2018) | 3 lines

[X86] Change an llvm_unreachable to a report_fatal_error so the optimizer will stop making us reach the other report_fatal_error in this function.

There's a conditional report_fatal_error just above this llvm_unreachable. The optimizer when seeing the unreachable removes the conditional and just makes any other error trigger the existing report_fatal_error.
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r343373 | rksimon | 2018-09-29 06:25:22 -0700 (Sat, 29 Sep 2018) | 3 lines

[X86][SSE] Fixed issue with v2i64 variable shifts on 32-bit targets

The shift amount might have peeked through a extract_subvector, altering the number of vector elements in the 'Amt' variable - so we were incorrectly calculating the ratio when peeking through bitcasts, resulting in incorrectly detecting splats.
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r342461 | devnexen | 2018-09-18 03:31:10 -0700 (Tue, 18 Sep 2018) | 10 lines

[Xray] llvm-xray fix possible segfault

top argument when superior to the instrumentated code list capacity can lead to a segfault.

Reviewers: dberris

Reviewed By: dberris

Differential Revision: https://reviews.llvm.org/D52224

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r344325 | evgeny777 | 2018-10-12 00:24:02 -0700 (Fri, 12 Oct 2018) | 4 lines

[ThinLTO] Don't import GV which contains blockaddress

Differential revision: https://reviews.llvm.org/D53139

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r344454 | xbolva00 | 2018-10-13 08:21:55 -0700 (Sat, 13 Oct 2018) | 11 lines

[InstCombine] Fixed crash with aliased functions

Summary: Fixes PR39177

Reviewers: spatel, jbuening

Reviewed By: jbuening

Subscribers: jbuening, llvm-commits

Differential Revision: https://reviews.llvm.org/D53129
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r344455 | xbolva00 | 2018-10-13 08:26:13 -0700 (Sat, 13 Oct 2018) | 2 lines

[NFC] Fixed duplicated test file

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r344645 | xbolva00 | 2018-10-16 14:18:31 -0700 (Tue, 16 Oct 2018) | 9 lines

[InstCombine] Cleanup libfunc attribute inferring

Reviewers: efriedma

Reviewed By: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D53338
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r342354 | kristina | 2018-09-16 15:21:59 -0700 (Sun, 16 Sep 2018) | 11 lines

[DebugInfo] Fix build when std::vector::iterator is a pointer

std::vector::iterator type may be a pointer, then
iterator::value_type fails to compile since iterator is not a class,
namespace, or enumeration.

Patch by orivej (Orivej Desh)

Differential Revision: https://reviews.llvm.org/D52142

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