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[arch][riscv] add a way for platforms to set optional riscv ISA exten… #453

[arch][riscv] add a way for platforms to set optional riscv ISA exten…

[arch][riscv] add a way for platforms to set optional riscv ISA exten… #453

Triggered via push April 8, 2024 06:27
Status Failure
Total duration 4m 55s
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github-ci.yml

on: push
Matrix: build
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16 errors
build (7.5.0, 0, 0, qemu-virt-riscv64-supervisor-test)
Process completed with exit code 2.
build (7.5.0, 0, 0, qemu-virt-riscv64-test)
Process completed with exit code 2.
build (7.5.0, 0, 0, qemu-virt-riscv32-test)
Process completed with exit code 2.
build (7.5.0, 0, 0, visionfive2-test)
Process completed with exit code 2.
build (7.5.0, 0, 1, qemu-virt-riscv64-test)
Process completed with exit code 2.
build (7.5.0, 0, 1, qemu-virt-riscv64-supervisor-test)
Process completed with exit code 2.
build (7.5.0, 0, 1, qemu-virt-riscv32-test)
Process completed with exit code 2.
build (7.5.0, 0, 1, visionfive2-test)
Process completed with exit code 2.
build (7.5.0, 2, 0, qemu-virt-riscv64-supervisor-test)
Process completed with exit code 2.
build (7.5.0, 2, 0, qemu-virt-riscv64-test)
Process completed with exit code 2.
build (7.5.0, 2, 0, qemu-virt-riscv32-test)
Process completed with exit code 2.
build (7.5.0, 2, 0, visionfive2-test)
Process completed with exit code 2.
build (7.5.0, 2, 1, qemu-virt-riscv64-supervisor-test)
Process completed with exit code 2.
build (7.5.0, 2, 1, qemu-virt-riscv64-test)
Process completed with exit code 2.
build (7.5.0, 2, 1, qemu-virt-riscv32-test)
Process completed with exit code 2.
build (7.5.0, 2, 1, visionfive2-test)
Process completed with exit code 2.