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xxx0 maximized (t400 x200) #953

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@tlaurion tlaurion commented Jan 4, 2021

Forced pushed t400/x200 and t400-debug to commit cbde51f on March 03 2023.

Builds can be tested for 30 days under CircleCI for that commit (click green mark, go to board, select artifacts tab, download ROM and flash).

@fhvyhjriur please test and report in this PR (t400 and x200 only since I own x200 and you own t400).


TODO:

  • remove t400-debug board prior of merge
  • confirm owned platforms and only add support for them

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tlaurion commented Jan 5, 2021

Needs #954 related changes

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fhvyhjriur commented Jan 10, 2021

Tested on T400 and its not working. https://app.circleci.com/pipelines/github/tlaurion/heads/685/workflows/4a79bc0b-d2fb-40fd-b410-7e0a314832e2/jobs/756/artifacts
I tested on a T400 with preinstalled 8MB SPI chip(no soldering work had to be done). Before heads it had the latest OEM bios preinstalled. After i did the known time consuming flashing instruction https://libreboot.org/docs/install/t400_external.html at first boot it just beeped once loud and nothing on the screen. At second boot it does not beep any more and still nothing on the screen. I swapped some RAM but no change. I can reproduce the loud beep when i disconnect the CMOS-battery to delete the probably saved settings. It then beeps again at first poweron.

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So I guess x200 won't work either. Will find my old machine and test in the next weeks on it.

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I tested removing the CD/DVD-Drive and the wifi-card. No change.
Then i tried to get EHCI-Debug output from one of the 3 USB ports ( i tried all 3 ) but none of those provide any corebooot ehci-debug output. Is EHCI-Debug enabled in the build?

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@fhvyhjriur nope it is not. Could bring the changes from an old devel branch. Will do.

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Found trace of my last debugging attempt here (just to have a trace) #700 (comment)

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config, fstab and other changes to pick from: master...tlaurion:x230-debug

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Trace for screwdriver setup, used in the past to troubleshoot what was happening on x220 when debug was needed #541 (comment)

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tlaurion commented Jan 17, 2021

Any help welcome, that was it for today.

Basically, needed to be added under coreboot conf:

CONFIG_CONSOLE_USB=y
CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_CBFS_SIZE=0x7e8000
CONFIG_CONSOLE_USB=y
CONFIG_CONSOLE_CBMEM_DUMP_TO_UART=y

Then on beaglebone black turned into screwdriver USB DEBUG dongle: #541 (comment)

@tlaurion tlaurion changed the title xxx0 maximized (t400 x200) (NEEDS DEBUGGING) xxx0 maximized (t400 x200) Jan 17, 2021
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tlaurion commented Jan 17, 2021

Also note TPM-less limit of current HOTP USB Security dongle current added security here

@fhvyhjriur please confirm interest in TPM-less GM45 based platforms.

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I confirm interest in TPM-less GM45 based plattforms.

At the moment the t400 is sitting there with the non working image. Is there any image i can flash external with debugging output enabled? Then i could provide the debugging logs.

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tlaurion commented Mar 3, 2023

@fhvyhjriur I forced push t400-maximized, t400-maximized-debug and x200-maximized under this PR.

Added t400-maximized-debug per last comment.

Please test and post results.

  • Reusing linux-x230-legacy linux config (optimized for size)
  • coreboot 4.13 based as all other xx30 boards as of now
  • t400-maximized-debug is supposed to include USB Debugging
  • Adapted CBFS_SIZE of coreboot config to have all BIOS size region reported under ifd BIOS region
  • Added coreboot CBFS_SIZE calculation notes under blobs/xx00/README

As you can see in cbde51f adapting IS NOT HARD.

I expect users to be collaborators for such requests. Afterall, Heads is a coreboot config + linux config to support a new board. So tweaking of those should be possible without too much of a learning curve.

Comment on lines +11 to +15
cd ~/heads/build/coreboot-4.8.1/util/bincfg
make gen-gbe-ich9m
make gen-ifd-x200
mv flashregion_0_fd.bin ../../../../blobs/xxx0/ifd.bin
mv flashregion_3_gbe.bin ../../../../blobs/xxx0/gbe.bin
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@fhvyhjriur as you can see, the ifd.bin and gbe.bin blobs were generated. If board is beeping on boot, it is most probably because something is wrong there.

ifd.bin: OK

IFD contains regions that were outputed to layout.txt through ifdtool -f layout.txt ifd.bin
It defines a BIOS region of 007fffff – 00003000 = 7FCFFF
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This size is reflected under coreboot config. When boards are not booting (different then beeping), in the past it was because of a size mismatch between ifd defined regions and CBFS_SIZE defined under coreboot config.

Note that first boot after flash might take a couple of seconds more since memory init is done the first time and results need to be injected in CBFS as well.

# Configuration for a t400 running non-Qubes OSes with USBDEBUG activated under coreboot config
#
# Deactivated to fit in coreboot's CONFIG_CBFS_SIZE=0x7FCFFF:
# dropbear support(ssh client/server)
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Could be reactivated. When looking at output of builds, there is still of space for 8mb ROMs.
Note that really soon, bash will be included in roms, taking 150kb of CBFS space.

CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xxx0/gbe.bin"
CONFIG_HAVE_IFD_BIN=y
CONFIG_BOARD_LENOVO_T400=y
CONFIG_LINUX_COMMAND_LINE="intel_iommu=igfx_off quiet"
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Was different in past commit. I do not remember why different OS kernel tweaks were passed before.

@@ -0,0 +1,15 @@
CONFIG_VENDOR_LENOVO=y
CONFIG_CBFS_SIZE=0x7FCFFF
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From README notes, based on ifdtool -f output saved under layout.txt, where end-begin of BIOS REGION gives that value,.

CONFIG_GBE_BIN_PATH="@BLOB_DIR@/xxx0/gbe.bin"
CONFIG_HAVE_IFD_BIN=y
CONFIG_BOARD_LENOVO_X200=y
CONFIG_LINUX_COMMAND_LINE="intel_iommu=igfx_off quiet"
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This is Heads kernel options passed from coreboot to the kernel Heads is booting.

As of now, nothing is tweaked here for i915/drm driver and coreboot boots without IGFX_INIT, meaning that the kernel is seldom responsible for graphic initialization.

linux config, as specified in board config, reuses linux-x230-legacy.conf, which includes i915 and i915 drm drivers. It should just work (tm).

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tlaurion commented Mar 3, 2023

@fhvyhjriur I took time and flashed https://output.circle-artifacts.com/output/job/f7ee6a22-6607-4471-b01d-7eccef45582f/artifacts/0/build/x86/x200-maximized/heads-x200-maximized-v0.2.0-1401-gcbde51f.rom onto my x200 vPro.

Boots into Heads successfully with fbwhiptail (default for all laptops/workstations).

@tlaurion tlaurion changed the title (NEEDS DEBUGGING) xxx0 maximized (t400 x200) xxx0 maximized (t400 x200) Mar 3, 2023
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tlaurion commented Mar 3, 2023

There is around 1mb free in current state under 8mb SPI (vPro x200 stickers).
I would advise simply forgetting supporting 4mb xx00 (non-vPro models).

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@fhvyhjriur If you want the t400/x200 board to be put upstream to have images being built for each commit, please do not let this bitrot too long....

I took the time to do this, tested it on x200 vpro, it works.
It is expected that you test this and report back here, after which I will merge the board tested (t400) upstream after having removed the debug version of when said unneeded.

Thank you for your understanding.

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Hello,

I would be available to test an X200 build. I came across Heads recently, and am happy to help work towards upstreaming the work you've done for this laptop I have on-hand.

I can't test immediately since I have 4mb flash installed currently. However, I believe (via https://libreboot.org/docs/hardware/x200.html) swapping in a 16mb flash should allow me to test this.

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I can't test immediately since I have 4mb flash installed currently. However, I believe (via https://libreboot.org/docs/hardware/x200.html) swapping in a 16mb flash should allow me to test this.

This PR is old and would need work to match upstream. Also, board configs were for the 8mb chip matching x200 vPro.

It would not be difficult to create different board configs for 8mb and 16mb though, mostly being different coreboot configs specifying rom size and cbfs sizes correctly.

Board names would need to be clear about it.

@jleightcap tag me when you have swapped to 16mb and have libreboot working on it?

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jleightcap commented Sep 18, 2023 via email

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I am sorry for missing the builds more then a year ago. You told that you would like to not build images for devices with a OEM SPI size of 8 and not expect many people upgrading the SPI chips to 16 like i mostly do.
I respect that and closed the other issue with this comment: #925 (comment)
If you like, you can also close this issue for same reason.

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tlaurion commented May 7, 2024

Do you see a purpose in testing this and maintaining this @fhvyhjriur ? This is one commit, I can easily merge master here which will trigger a rebuild.

@tlaurion tlaurion closed this May 12, 2024
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I can test T400 again like i did before when its not a problem to trigger a rebuild again. I can test from time to time and report when it broken when this is fulfills the requirement of maintaining.

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3 participants