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xx20/xx30 maximized coreboot configs: Fix CONFIG_CBFS_SIZE to reflect ifd.bin's BIOS region (xx20: gain of 0.59mb, xx30: gain of 0.4mb #1298

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merged 1 commit into from
Feb 9, 2023

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tlaurion
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@tlaurion tlaurion commented Jan 28, 2023

The calculations outlined at #1282 (comment) sums to having 'ifdtool -f layout.txt ifd_shrinked.bin && cat layout.txt'

The content of layout.txt for T440p:

00000000:00000fff fd
00021000:00bfffff bios
00003000:00020fff me
00001000:00002fff gbe

Here:
00bfffff-00021000=BDEFFF
BDEFFF to decimal = 12447743

Which is exact result of @rbeslow's calculations, and was recommended calculation for CBFS size (outside of bugs), otherwise setting it to 8mb.

There is an issue on haswell, maybe because of car, maybe because of non native memory init blob, but all of that is related to #1282, not here.

But this is not the case for xx20/xx30 boards which have native ram init (where t440p should see it hapenning under 4.19+)


Tested with this PR:

  • xx30: Gain of 0.4mb flashed x230-maximized: booted with same boot time (felt 5s, same as master).
  • xx20: t420 and x220 reported as tested successfully
    • Gain of 0.59mb!!!

This would be free gain for #590!!!


This, if working for all boards with unlocked ifd (maximized builds), (truely) maximizes available space for Heads (CBFS), based on freed ME space relegated to BIOS region.

Now time to test other boards. Tagging people from #692 to test only if external programmer accessible:

@tlaurion
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tlaurion commented Jan 28, 2023

Additional details:

x230-hotp-maximized

FMAP REGION: COREBOOT
Name                           Offset     Type           Size   Comp
cbfs master header             0x0        cbfs header        32 none
fallback/romstage              0x80       stage           85100 none
cpu_microcode_blob.bin         0x14d80    microcode       26624 none
fallback/ramstage              0x1b600    stage           97672 none
config                         0x333c0    raw               834 none
revision                       0x33740    raw               691 none
fallback/dsdt.aml              0x33a40    raw             14615 none
vbt.bin                        0x373c0    raw              1433 LZMA (4281 decompressed)
cmos_layout.bin                0x379c0    cmos_layout      1884 none
fallback/postcar               0x38180    stage           25816 none
fallback/payload               0x3e6c0    simple elf    7321031 none
(empty)                        0x739cc0   null          4350168 none
bootblock                      0xb5fdc0   bootblock       65536 none 
FMAP REGION: COREBOOT
Name                           Offset     Type           Size   Comp
cbfs master header             0x0        cbfs header        32 none
fallback/romstage              0x80       stage           85100 none
cpu_microcode_blob.bin         0x14d80    microcode       26624 none
fallback/ramstage              0x1b600    stage           97670 none
config                         0x333c0    raw               834 none
revision                       0x33740    raw               691 none
fallback/dsdt.aml              0x33a40    raw             14615 none
vbt.bin                        0x373c0    raw              1433 LZMA (4281 decompressed)
cmos_layout.bin                0x379c0    cmos_layout      1884 none
fallback/postcar               0x38180    stage           25816 none
fallback/payload               0x3e6c0    simple elf    7321543 none
(empty)                        0x739ec0   null          4742872 none
bootblock                      0xbbfdc0   bootblock       65536 none

4742872-4350168=392704 additional free bytes

t420-hotp-maximized

FMAP REGION: COREBOOT
Name                           Offset     Type           Size   Comp
cbfs master header             0x0        cbfs header        32 none
fallback/romstage              0x80       stage           87724 none
cpu_microcode_blob.bin         0x157c0    microcode       26624 none
fallback/ramstage              0x1c040    stage          119354 none
config                         0x392c0    raw               904 none
revision                       0x39680    raw               691 none
fallback/dsdt.aml              0x39980    raw             14615 none
vbt.bin                        0x3d300    raw              1368 LZMA (3985 decompressed)
cmos.default                   0x3d8c0    cmos_default      256 none
cmos_layout.bin                0x3da00    cmos_layout      1992 none
fallback/postcar               0x3e200    stage           27288 none
fallback/payload               0x44d00    simple elf    7222727 none
(empty)                        0x728300   null            31384 none
bootblock                      0x72fdc0   bootblock       65536 none
FMAP REGION: COREBOOT
Name                           Offset     Type           Size   Comp
cbfs master header             0x0        cbfs header        32 none
fallback/romstage              0x80       stage           87724 none
cpu_microcode_blob.bin         0x157c0    microcode       26624 none
fallback/ramstage              0x1c040    stage          119368 none
config                         0x392c0    raw               904 none
revision                       0x39680    raw               691 none
fallback/dsdt.aml              0x39980    raw             14615 none
vbt.bin                        0x3d300    raw              1368 LZMA (3985 decompressed)
cmos.default                   0x3d8c0    cmos_default      256 none
cmos_layout.bin                0x3da00    cmos_layout      1992 none
fallback/postcar               0x3e200    stage           27288 none
fallback/payload               0x44d00    simple elf    7221191 none
(empty)                        0x727d00   null           622744 none
bootblock                      0x7bfdc0   bootblock       65536 none

622744-31384=591360 additional free bytes

@srgrint
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srgrint commented Jan 29, 2023

I have just flashed https://output.circle-artifacts.com/output/job/008109e7-ede2-4ed1-95bc-dd9f5117edfc/artifacts/0/build/x86/x220-maximized/heads-x220-maximized-v0.2.0-1358-gf07ef81.rom on my x220. Seems to work fine with no adverse effects.

@natterangell
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natterangell commented Jan 29, 2023

t420-hotp-maximized works great!

@tlaurion
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t420-hotp-maximized works great!
@natterangell thanks for testing!!!

I'll wait for a couple of days but since we have xx20 reports, I'm comfortable merging.

@tlaurion
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tlaurion commented Jan 31, 2023

… ifd.bin's BIOS regions.

The calculations outlined at linuxboot#1282 (comment)
Sums to having 'ifdtool -f layout.txt ifd_shrinked.bin && cat layout.txt'
The example for T440p:
00000000:00000fff fd
00021000:00bfffff bios
00003000:00020fff me
00001000:00002fff gbe

Here: 00bfffff-00021000=BDEFFF
Which is exact result of @rbeslow's calculations.

There is an issue on haswell, maybe because of car, maybe because of non native memory init blob.
But this is not the case for xx20/xx30 boards.
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