Writeable instruction memory tests #12
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…InstrMemTest now sends data from binary file
… Still needs testing on FPGA
…ort from PC. Is able to program Leros on basys3 over serial port. Testbench needs to be modified to work for branch.s test program
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This PR fails the CI. Please check it. |
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This PR is also a bit too big. Can we please split it. Thanks, Martin |
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As agreed we will close this. |
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Fixed a number of issues in writeable instruction memory.
Added chisel test for testing writable instruction memory. The test loads a number of programs one after another and ensures the accumulator ends with 0.
LED register is only updated upon an exit system call. Useful for testing in FGPA to see end value of accumulator.
Added system call instruction to indicate end of file, this is used by program loader to know when last bytes of program have been received.
Added
LerosConfig.scala, all constants and configurations related to Leros are entered here.Added
SramSim.scala, this is a SRAM simulation model that matches the ones used in the Edu4Chip project. This SRAM model is used in data memory and instruction memory.