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Refactor debug views
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kelpsyberry committed Mar 29, 2024
1 parent a57c47a commit 4fe7796
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Showing 13 changed files with 1,012 additions and 819 deletions.
28 changes: 4 additions & 24 deletions core/src/cpu/arm9/bus/fallback.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1316,12 +1316,7 @@ pub fn write_16<A: AccessType, E: Engine>(emu: &mut Emu<E>, mut addr: u32, value
}
}

0x05 => {
emu.gpu.vram.palette.write_le(addr as usize & 0x7FE, value);
if let Some(updates) = &mut emu.gpu.vram.bg_obj_updates {
updates.get_mut()[(addr >> 10 & 1) as usize].palette = true;
}
}
0x05 => emu.gpu.vram.write_palette(addr & 0x7FE, value),

0x06 => match addr >> 21 & 7 {
0 => emu.gpu.vram.write_a_bg(addr, value),
Expand All @@ -1331,12 +1326,7 @@ pub fn write_16<A: AccessType, E: Engine>(emu: &mut Emu<E>, mut addr: u32, value
_ => emu.gpu.vram.write_lcdc(addr, value),
},

0x07 => {
emu.gpu.vram.oam.write_le(addr as usize & 0x7FE, value);
if let Some(updates) = &mut emu.gpu.vram.bg_obj_updates {
updates.get_mut()[(addr >> 10 & 1) as usize].oam = true;
}
}
0x07 => emu.gpu.vram.write_oam(addr & 0x7FE, value),

_ =>
{
Expand Down Expand Up @@ -1667,12 +1657,7 @@ pub fn write_32<A: AccessType, E: Engine>(emu: &mut Emu<E>, mut addr: u32, mut v
}
}

0x05 => {
emu.gpu.vram.palette.write_le(addr as usize & 0x7FC, value);
if let Some(updates) = &mut emu.gpu.vram.bg_obj_updates {
updates.get_mut()[(addr >> 10 & 1) as usize].palette = true;
}
}
0x05 => emu.gpu.vram.write_palette(addr & 0x7FC, value),

0x06 => match addr >> 21 & 7 {
0 => emu.gpu.vram.write_a_bg(addr, value),
Expand All @@ -1682,12 +1667,7 @@ pub fn write_32<A: AccessType, E: Engine>(emu: &mut Emu<E>, mut addr: u32, mut v
_ => emu.gpu.vram.write_lcdc(addr, value),
},

0x07 => {
emu.gpu.vram.oam.write_le(addr as usize & 0x7FC, value);
if let Some(updates) = &mut emu.gpu.vram.bg_obj_updates {
updates.get_mut()[(addr >> 10 & 1) as usize].oam = true;
}
}
0x07 => emu.gpu.vram.write_oam(addr & 0x7FC, value),

_ =>
{
Expand Down
2 changes: 1 addition & 1 deletion core/src/emu.rs
Original file line number Diff line number Diff line change
Expand Up @@ -503,7 +503,7 @@ impl<E: cpu::Engine> Emu<E> {
.write_control(swram::Control(3), &mut self.arm7, &mut self.arm9);
self.gpu.write_power_control(gpu::PowerControl(0x820F));

// ––––––––––––––– Game boot code –––––––––––––––
// ––––––––––––––– Program boot code –––––––––––––––

let mut arm7_loaded_data = BoxedByteSlice::new_zeroed(header.arm7_size() as usize);
self.ds_slot
Expand Down
22 changes: 22 additions & 0 deletions core/src/gpu/vram/access.rs
Original file line number Diff line number Diff line change
Expand Up @@ -702,4 +702,26 @@ impl Vram {
self.arm7.write_le_aligned_unchecked(addr, value);
}
}

#[inline]
pub fn write_palette<T: MemValue>(&mut self, addr: u32, value: T)
where
[(); mem::size_of::<T>()]: Sized,
{
self.palette.write_le(addr as usize, value);
if let Some(updates) = &mut self.bg_obj_updates {
updates.get_mut()[(addr >> 10 & 1) as usize].palette = true;
}
}

#[inline]
pub fn write_oam<T: MemValue>(&mut self, addr: u32, value: T)
where
[(); mem::size_of::<T>()]: Sized,
{
self.oam.write_le(addr as usize, value);
if let Some(updates) = &mut self.bg_obj_updates {
updates.get_mut()[(addr >> 10 & 1) as usize].oam = true;
}
}
}
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