Implementation of Deep Learning strategies for the FPGA in VHDL.
The idea is to detect certain audio signals by using a FPGA and an Autoencoder. The specific use case, that is used in this project is to be able to detect the screech noise that a trains is doing when driving through a curve and spray water to prevent it. Therefore a rapid detection e.g. with a FPGA is needed.
For a good overview start reading the walkthrough or the exhibition slides
By publishing the authors hopes that people can use the work to develop their own audio detection mechanism for a FPGA and to increase the overall research on deep learning for FPGAs.