Spin table and kernel load address enhancements

- Add an entry in the spin table for CPU0. While this won't be used, the
  DT binding for cpu-release-addr indicates the property is required for
  all CPUs, and the memory pointed at must be initialized to 0. Hence, we
  must reserve space for CPU0.

- Add a public location for the VC FW to write the kernel entry point to.
  This defaults to 0x8000 for backwards-compatibility. This code will jump
  to the address stored in location 0xd0, rather than hard-coding an entry
  point of 0x8000.

- Remove org to 0x8000 at the end of the file. This was originally present
  to force the binary image of the file to be padded out to that address,
  which in turned avoided the need for padding if concatenating the binary
  with its payload. Since the VC FW loads the binary separately from the
  payload, this isn't required.

armstubs/armstub8.S

@@ -92,7 +92,7 @@ in_el2:
 	and x6, x6, #0x3
 	cbz x6, primary_cpu
 
-	adr x5, spin_table - 8
+	adr x5, spin_table
 secondary_spin:
 	wfe
 	ldr x4, [x5, x6, lsl #3]
@@ -101,7 +101,7 @@ secondary_spin:
 	b boot_kernel
 
 primary_cpu:
-	adr x4, kernel_entry
+	ldr x4, kernel_entry
 	ldr x0, dtb_ptr
 
 boot_kernel:
@@ -112,9 +112,15 @@ boot_kernel:
 
 .ltorg
 
-.org 0xe0
+.org 0xd0
+.globl kernel_entry
+kernel_entry:
+	.quad 0x8000
+
+.org 0xd8
 .globl spin_table
 spin_table:
+	.quad 0 // CPU 0 @ 0xd8
 	.quad 0 // CPU 1 @ 0xe0
 	.quad 0 // CPU 2 @ 0xe8
 	.quad 0 // CPU 3 @ 0xf0
@@ -127,6 +133,3 @@ dtb_ptr:
 .org 0x100
 .globl dtb_space
 dtb_space:
-
-.org 0x8000
-kernel_entry: