Hardcaml is an OCaml library for designing and testing hardware designs.
- Express hardware designs in OCaml
- Make generic designs using higher order functions, lists, maps, functors...
- Simulate designs in OCaml
- Convert to (hierarchical) Verilog or VHDL
- Write new modules to transform or analyse circuits, or provide new backends
$ opam install hardcaml ppx_deriving_hardcaml hardcaml_waveterm
Hardcaml_waveterm- ASCII based digital waveforms. Usable in expect tests or from an interactive terminal application.Hardcaml_c- convert Hardcaml designs to C-based simulation models. Provides an API compatible with the standard Cyclesim module. Trades compilation time for runtime performance.Hardcaml_verilator- Convert Hardcaml designs to very high speed simulation model using the open source Verilator compiler.Hardcaml_step_testbench- Monadic testbench API. Control multiple tasks synchronized to a clock without converting to a statemachine coding style.
Hardcaml_circuits- A library of useful/interesting Hardcaml designsHardcaml_fixed_point- Fixed point arithmetic with rounding and overflow controlHardcaml_xilinx- Various Xilinx primitives wrapped with Hardcaml interfaces and simulation modelsHardcaml_xilinx_components- Tool to read Xilinx unisim and xpm component definitions and generate Hardcaml interfaces
Hardcaml_of_verilog- Convert a verilog design to Hardcaml using YosysHardcaml_verify- SAT based formal verification tools for Hardcamlhardcaml_mips- A simple 5-stage MIPs CPU with associated blog detailing the development process.hardcaml_arty- Infrastructure targetting the Arty A7 board.