Skip to content
View jge162's full-sized avatar
💭
Be yourself; everyone else is taken
💭
Be yourself; everyone else is taken
85 followers · 5 following

Achievements

Achievement: Starstruckx2Achievement: Pull Sharkx3Achievement: Galaxy Brainx4Achievement: Pair Extraordinairex3

Achievements

Achievement: Starstruckx2Achievement: Pull Sharkx3Achievement: Galaxy Brainx4Achievement: Pair Extraordinairex3

Highlights

Block or report jge162

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
jge162/README.md

jge162

GitHub User's stars GitHub Badge

Electrical & Cybersecurity Engineer

Hi, I am Jeremy Escobar. I have a strong academic foundation and hands-on experience, I am committed to driving innovation, delivering results, and leveraging my capabilities in Engineering.

Pinned Loading

  1. 471-SeniorDesign 471-SeniorDesign Public

    Team of four CSUF seniors creating an innovative 'Automatic Waste Sorter' that utilizes advanced technology to sort waste accurately and efficiently. The system's core is driven by a Google Coral D…

    Python 8 1

  2. Embedded-Projects Embedded-Projects Public

    Embedded C projects completed while in attendance at CSUF, ADC, DAC, Matlab filter and FSM traffic light.

    C 6

  3. SWE-Group-Project SWE-Group-Project Public

    Foundation in Software Engineering. Basic concepts, principles, methods, techniques and practices of software engineering. All aspects of the software engineering fields. Use Computer-Aided Softwar…

    JavaScript 5

  4. ScoreBoardW-Timer ScoreBoardW-Timer Public

    Objective of this project was to emulate a Basketball score board, with timer and two teams scores. See readme for pic and more details. FPGA design with Vivado

    Verilog 4