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fix: Adjustment of drvemSetup to support the GTX refactoring.
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jerzyjamroz committed Dec 27, 2023
1 parent 3ec9e44 commit 1271e8a
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Showing 2 changed files with 8 additions and 9 deletions.
1 change: 0 additions & 1 deletion evrMrmApp/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -5,4 +5,3 @@ DIRS := $(DIRS) $(filter-out $(DIRS), $(wildcard *Src*))
DIRS := $(DIRS) $(filter-out $(DIRS), $(wildcard *db*))
DIRS := $(DIRS) $(filter-out $(DIRS), $(wildcard *Db*))
include $(TOP)/configure/RULES_DIRS

16 changes: 8 additions & 8 deletions evrMrmApp/src/drvemSetup.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -183,8 +183,8 @@ static const EVRMRM::Config mtca_evr_300rf = {
10, // RB outputs (RTM)
8, // Backplane outputs
2, // FP Delay outputs
4, // CML/GTX outputs - one univ. I/O slot (2 outputs), 1x SFP, 1x CML
MRMCML::typeTG300,
6, // CML/GTX outputs - CLKA/B, 1x UNIV I/O slot (2 outputs), 1x SFP, 1x CML
MRMCML::typeCML,
/**
* 0 <= N <= 1 : FPInMap
* 2 <= N <= 15 : UnivInMap
Expand All @@ -199,11 +199,11 @@ static const EVRMRM::Config mtca_evr_300u = { // with UNIV slots on FP
8, // prescalers
4, // FP outputs
4, // FPUV outputs
16, // RB outputs (RTM)
10, // RB outputs (RTM)
8, // Backplane outputs
2, // FP Delay outputs
0, // CML/GTX outputs
MRMCML::typeTG300,
2, // CML/GTX outputs - CLKA/B
MRMCML::typeCML,
/**
* 0 <= N <= 3 : FPInMap
* 4 <= N <= 23 : UnivInMap
Expand All @@ -217,12 +217,12 @@ static const EVRMRM::Config mtca_evr_300 = {
24, // pulse generators
8, // prescalers
4, // FP outputs
16, // Univ outputs
4, // Univ outputs
10, // RB outputs (10 EVRTM)
8, // Backplane outputs
2, // FP Delay outputs
0, // CML/GTX outputs
MRMCML::typeTG300,
2, // CML/GTX outputs - CLKA/B
MRMCML::typeCML,
/**
* 0 <= N <= 3 : FPInMap
* 4 <= N <= 23 : UnivInMap
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