Fix nRF5340DK build after input changes. Add it to CI.

jakkra · Oct 19, 2023 · b283d75 · b283d75
1 parent 1c1bc41
commit b283d75
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Showing 3 changed files with 130 additions and 3 deletions.
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
@@ -13,7 +13,7 @@ jobs:
     strategy:
       matrix:
         built_type: [debug, release]
-        board: [zswatch_nrf5340_cpuapp@1, zswatch_nrf5340_cpuapp@3, native_posix]
+        board: [zswatch_nrf5340_cpuapp@1, zswatch_nrf5340_cpuapp@3, native_posix, nrf5340dk_nrf5340_cpuapp]
     steps:
       - name: Checkout
         uses: actions/checkout@v3

diff --git a/app/boards/nrf5340dk_nrf5340_cpuapp.conf b/app/boards/nrf5340dk_nrf5340_cpuapp.conf
@@ -0,0 +1,20 @@
+
+#---------------
+# FLASH
+#-----------------
+CONFIG_FLASH=y
+CONFIG_FLASH_PAGE_LAYOUT=y
+CONFIG_STREAM_FLASH=y
+CONFIG_FLASH_MAP=y
+CONFIG_NVS=y
+CONFIG_NORDIC_QSPI_NOR=y
+CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+
+CONFIG_MPU_ALLOW_FLASH_WRITE=y
+
+CONFIG_FILE_SYSTEM=y
+CONFIG_FILE_SYSTEM_LITTLEFS=y
+CONFIG_LV_Z_USE_FILESYSTEM=y
+CONFIG_LV_IMG_CACHE_DEF_SIZE=10
+
+CONFIG_FS_LITTLEFS_FC_HEAP_SIZE=16384
diff --git a/app/boards/nrf5340dk_nrf5340_cpuapp.overlay b/app/boards/nrf5340dk_nrf5340_cpuapp.overlay
@@ -60,15 +60,49 @@
         zephyr,display = &gc9a01;
         zephyr,keyboard-scan = &cst816s;
     };
+
     aliases {
         sw-top-right = &button2;
         sw-top-left = &button1;
-        sw-bottom-right = &button4;
+        sw-bottom-right = &button0;
         sw-bottom-left = &button3;
         magn = &lis2mdl;
         accel = &bmi270;
         input = &cst816s;
     };
+
+    longpress: longpress {
+        input = <&buttons>;
+        compatible = "zephyr,input-longpress";
+        input-codes = <INPUT_KEY_KP0>;
+        short-codes = <INPUT_KEY_4>;
+        long-codes = <INPUT_KEY_Y>;
+        long-delay-ms = <1000>;
+    };
+
+    buttons: buttons {
+        compatible = "gpio-keys";
+        button0: button_0 {
+            label = "top-right";
+            gpios = <&gpio0 23 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+            zephyr,code = <INPUT_KEY_1>;
+        };
+        button1: button_1 {
+            label = "bottom-left";
+            gpios = <&gpio0 24 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+            zephyr,code = <INPUT_KEY_2>;
+        };
+        button2: button_2 {
+            label = "bottom-right";
+            gpios = <&gpio0 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+            zephyr,code = <INPUT_KEY_3>;
+        };
+        button3: button_3 {
+            label = "top-left";
+            gpios = <&gpio0 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+            zephyr,code = <INPUT_KEY_KP0>;
+        };
+    };
 };
 
 &adc {
@@ -158,4 +192,77 @@
         reset-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
         dc-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
     };
-};
+};
+
+
+/ {
+	fstab {
+		compatible = "zephyr,fstab";
+		lvgl_lfs: lvgl_lfs {
+			compatible = "zephyr,fstab,littlefs";
+			mount-point = "/lvgl_lfs";
+			partition = <&lvgl_lfs_partition>;
+			automount;
+			read-size = <1024>;
+			prog-size = <512>;
+			cache-size = <4096>;
+			lookahead-size = <4096>;
+			block-cycles = <512>;
+		};
+	};
+};
+
+&mx25r64 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		lvgl_lfs_partition: partition@0 {
+			label = "lvgl_lfs_partition";
+			reg = <0x00000000 0x00200000>;
+		};
+		lvgl_raw_partition: partition@200000 {
+			label = "lvgl_raw_partition";
+			reg = <0x00200000 0x00200000>;
+		};
+        settings_partition: partition@400000 {
+            label = "settings_partition";
+            reg = <0x400000 0x100000 >;
+        };
+	};
+};
+
+/ {
+    sram@2007FFFF {
+        compatible = "zephyr,memory-region", "mmio-sram";
+        reg = <0x2007FFFF 0x1>;
+        zephyr,memory-region = "RetainedMem";
+        status = "okay";
+
+        retainedmem {
+            compatible = "zephyr,retained-ram";
+            status = "okay";
+            #address-cells = <1>;
+            #size-cells = <1>;
+
+            retention0: retention@0 {
+                compatible = "zephyr,retention";
+                status = "okay";
+                reg = <0x0 0x1>;
+            };
+        };
+    };
+
+    chosen {
+            zephyr,boot-mode = &retention0;
+    };
+};
+
+/* Reduce SRAM0 usage by 4 byte to account for non-init area
+* Even though boot mode is only one byte, nrfjprog only allows
+* 4 byte writes, hence reserve 4.
+*/
+&sram0 {
+    reg = <0x20000000 0x7FFFC>;
+};