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Merge branch 'Xilinx:main' into main
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jackl-xilinx committed Apr 8, 2024
2 parents 19c6732 + b334a07 commit 916cd2c
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2 changes: 1 addition & 1 deletion reference_designs/core/vector_add/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ vck5000: devicename=xcvc1902
vck5000: col=6

vck5000: build/aie.mlir
aiecc.py --link_against_hsa --host-target=x86_64-amd-linux-gnu build/aie.mlir \
aiecc.py --xchesscc --link_against_hsa --host-target=x86_64-amd-linux-gnu build/aie.mlir \
-I/opt/xaiengine/include \
-I$(ACDC_AIE)/runtime_lib/x86_64-hsa/test_lib/include \
-I${ROCM_ROOT}/include \
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4 changes: 2 additions & 2 deletions reference_designs/core/vector_add/run_vck5000.lit
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@@ -1,9 +1,9 @@
// (c) Copyright 2023 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
// REQUIRES: hsa
// REQUIRES: hsa, chess
//
// RUN: %python %S/aie2.py xcvc1902 6 > ./aie.mlir
// RUN: %python aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% ./aie.mlir -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test_vck5000.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib
// RUN: %python aiecc.py --xchesscc %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% ./aie.mlir -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test_vck5000.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib
// RUN: %run_on_vck5000 ./test.elf

2 changes: 1 addition & 1 deletion reference_designs/core/vector_mult/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@ vck5000: devicename=xcvc1902
vck5000: col=6

vck5000: build/aie.mlir
aiecc.py --link_against_hsa --host-target=x86_64-amd-linux-gnu build/aie.mlir \
aiecc.py --xchesscc --link_against_hsa --host-target=x86_64-amd-linux-gnu build/aie.mlir \
-I/opt/xaiengine/include \
-I$(ACDC_AIE)/runtime_lib/x86_64-hsa/test_lib/include \
-I${ROCM_ROOT}/include \
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4 changes: 2 additions & 2 deletions reference_designs/core/vector_mult/run_vck5000.lit
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
// (c) Copyright 2023 Advanced Micro Devices, Inc.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
// REQUIRES: hsa
// REQUIRES: hsa, chess
//
// RUN: %python %S/aie2.py xcvc1902 6 > ./aie.mlir
// RUN: %python aiecc.py %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% ./aie.mlir -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test_vck5000.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib
// RUN: %python aiecc.py --xchesscc %VitisSysrootFlag% --host-target=%aieHostTargetTriplet% %link_against_hsa% ./aie.mlir -I%host_runtime_lib%/test_lib/include %extraAieCcFlags% %S/test_vck5000.cpp -o test.elf -L%host_runtime_lib%/test_lib/lib -ltest_lib
// RUN: %run_on_vck5000 ./test.elf

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