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Integrate llvm-project at a571f82a50416b767fd3cce0fb5027bb5dfec58c (#…
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…8913)

* Reset third_party/llvm-project: a571f82a50416b767fd3cce0fb5027bb5dfec58c (2022-04-15 14:51:30 -0700): Update test to handle opaque pointers flag flip.

MHLO : 9b43a08be8ad6a9c8d77f37f61a7be6e0ec8c200
TF: bc7cfb0eef68e82cdf9d4afa68796fd38c595f0f
PiperOrigin-RevId: 442136106

- Add missing include of EnumAttr.td to dialect base files.
- Drop StrEnumAttr usage in Vulkan dialect.
- Update usages of StringAttr to IntegerAttr
- Fix Vulkan TargetEnvAttr assembly parsing and printing
- Fix SPIR-V vectorize_elementwise_ops test IR
- Fix remaining failing test IRs
- Fix MHLO tests.
- Fix MHLO tests in iree_tf_compiler.
- XFAIL top K tests for now

Co-authored-by: Lei Zhang <[email protected]>
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MaheshRavishankar and antiagainst authored Apr 20, 2022
1 parent a21ad58 commit 341150b
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2 changes: 1 addition & 1 deletion integrations/tensorflow/WORKSPACE
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@

load("@bazel_tools//tools/build_defs/repo:git.bzl", "git_repository")

TENSORFLOW_COMMIT = "0f352db4105832d8d2d4f007e9831bd1a7f60ba2"
TENSORFLOW_COMMIT = "bc7cfb0eef68e82cdf9d4afa68796fd38c595f0f"

git_repository(
name = "org_tensorflow",
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ func @sigmoid(%arg0: tensor<2xf32>) -> tensor<2xf32> {
// CHECK-DAG: [[SHAPE_VAL:%.+]] = shape.to_extent_tensor [[SHAPE_OF]] : tensor<1xindex> -> tensor<1xindex>
// CHECK-DAG: [[HALF:%.+]] = "mhlo.dynamic_broadcast_in_dim"([[SCALAR]], [[SHAPE_VAL]]) {broadcast_dimensions = dense<> : tensor<0xi64>} : (tensor<f32>, tensor<1xindex>) -> tensor<2xf32>
// CHECK-DAG: [[R1:%.+]] = mhlo.multiply %arg0, [[HALF]] : tensor<2xf32>
// CHECK-DAG: [[R2:%.+]] = "mhlo.tanh"([[R1]]) : (tensor<2xf32>) -> tensor<2xf32>
// CHECK-DAG: [[R2:%.+]] = mhlo.tanh [[R1]] : tensor<2xf32>
// CHECK-DAG: [[R3:%.+]] = mhlo.multiply [[R2]], [[HALF]] : tensor<2xf32>
// CHECK-DAG: [[R4:%.+]] = mhlo.add [[R3]], [[HALF]] : tensor<2xf32>
%0 = "tf.Sigmoid"(%arg0) : (tensor<2xf32>) -> tensor<2xf32>
Expand All @@ -29,7 +29,7 @@ func @sigmoid_unranked(%arg0: tensor<*xf32>) -> tensor<*xf32> {
// CHECK-DAG: [[SHAPE_VAL:%.+]] = shape.to_extent_tensor [[SHAPE_OF]] : tensor<?xindex> -> tensor<?xindex>
// CHECK-DAG: [[HALF:%.+]] = "mhlo.dynamic_broadcast_in_dim"([[SCALAR]], [[SHAPE_VAL]]) {broadcast_dimensions = dense<> : tensor<0xi64>} : (tensor<f32>, tensor<?xindex>) -> tensor<*xf32>
// CHECK-DAG: [[R1:%.+]] = mhlo.multiply %arg0, [[HALF]] : tensor<*xf32>
// CHECK-DAG: [[R2:%.+]] = "mhlo.tanh"([[R1]]) : (tensor<*xf32>) -> tensor<*xf32>
// CHECK-DAG: [[R2:%.+]] = mhlo.tanh [[R1]] : tensor<*xf32>
// CHECK-DAG: [[R3:%.+]] = mhlo.multiply [[R2]], [[HALF]] : tensor<*xf32>
// CHECK-DAG: [[R4:%.+]] = mhlo.add [[R3]], [[HALF]] : tensor<*xf32>
%0 = "tf.Sigmoid"(%arg0) : (tensor<*xf32>) -> tensor<*xf32>
Expand Down
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
# REQUIRES: llvmaot
# RUN: %PYTHON -m iree_tf_tests.math.math_test --target_backends=iree_llvmaot --dynamic_dims=false --functions=top_k -artifacts_dir=%t
# XFAIL: *
Original file line number Diff line number Diff line change
@@ -1,2 +1,3 @@
# REQUIRES: vulkan
# RUN: %PYTHON -m iree_tf_tests.math.math_test --target_backends=iree_vulkan --dynamic_dims=false --functions=top_k -artifacts_dir=%t
# XFAIL: *
43 changes: 19 additions & 24 deletions iree/compiler/Codegen/SPIRV/test/vectorize_elementwise_ops.mlir
Original file line number Diff line number Diff line change
Expand Up @@ -51,27 +51,22 @@ func.func @transpose_add(%lhs: tensor<4x2xf32>, %rhs: tensor<2xf32>) -> tensor<2
// CHECK-DAG: %[[C3:.+]] = arith.constant 3 : index
// CHECK-DAG: %[[RINIT:.+]] = arith.constant dense<0.000000e+00> : vector<4x2xf32>
// CHECK: %[[OINIT:.+]] = linalg.init_tensor [2, 4] : tensor<2x4xf32>
// CHECK: %[[LHS0:.+]] = vector.transfer_read %[[LHS]][%[[C0]], %[[C0]]]{{.*}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS0S:.+]] = vector.insert %[[LHS0:.+]], %[[RINIT]] [0] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[LHS1:.+]] = vector.transfer_read %[[LHS]][%[[C1]], %[[C0]]]{{.*}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS1S:.+]] = vector.insert %[[LHS1:.+]], %[[LHS0S:.+]] [1] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[LHS2:.+]] = vector.transfer_read %[[LHS]][%[[C2]], %[[C0]]]{{.*}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS2S:.+]] = vector.insert %[[LHS2:.+]], %[[LHS1S:.+]] [2] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[LHS3:.+]] = vector.transfer_read %[[LHS]][%[[C3]], %[[C0]]]{{.*}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS3S:.+]] = vector.insert %[[LHS3:.+]], %[[LHS2S:.+]] [3] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[LT:.+]] = vector.transpose %[[LHS3S]], [1, 0] : vector<4x2xf32> to vector<2x4xf32>
// CHECK: %[[READ:.+]] = vector.transfer_read %[[RHS]]{{.+}} : tensor<2xf32>, vector<2xf32>
// CHECK: %[[INSERT0:.+]] = vector.insert %[[READ]], %[[RINIT]] [0] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[INSERT1:.+]] = vector.insert %[[READ]], %[[INSERT0]] [1] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[INSERT2:.+]] = vector.insert %[[READ]], %[[INSERT1]] [2] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[INSERT3:.+]] = vector.insert %[[READ]], %[[INSERT2]] [3] : vector<2xf32> into vector<4x2xf32>
// CHECK: %[[RT:.+]] = vector.transpose %[[INSERT3]], [1, 0] : vector<4x2xf32> to vector<2x4xf32>
// CHECK: %[[EXTRACT0:.+]] = vector.extract %[[LT]][0]
// CHECK: %[[EXTRACT1:.+]] = vector.extract %[[RT]][0]
// CHECK: %[[ADD0:.+]] = arith.addf %[[EXTRACT0]], %[[EXTRACT1]] : vector<4xf32>
// CHECK: %[[EXTRACT0:.+]] = vector.extract %[[LT]][1]
// CHECK: %[[EXTRACT1:.+]] = vector.extract %[[RT]][1]
// CHECK: %[[ADD1:.+]] = arith.addf %[[EXTRACT0]], %[[EXTRACT1]] : vector<4xf32>
// CHECK: %[[WRITE0:.+]] = vector.transfer_write %[[ADD0]], %[[OINIT]][%[[C0]], %[[C0]]]
// CHECK: %[[WRITE1:.+]] = vector.transfer_write %[[ADD1]], %[[WRITE0]][%[[C1]], %[[C0]]]
// CHECK: return %[[WRITE1]]
// CHECK: %[[LHS0:.+]] = vector.transfer_read %arg0[%[[C0]], %[[C0]]]{{.+}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS1:.+]] = vector.transfer_read %arg0[%[[C1]], %[[C0]]]{{.+}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS2:.+]] = vector.transfer_read %arg0[%[[C2]], %[[C0]]]{{.+}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[LHS3:.+]] = vector.transfer_read %arg0[%[[C3]], %[[C0]]]{{.+}} : tensor<4x2xf32>, vector<2xf32>
// CHECK: %[[READ:.+]] = vector.transfer_read %arg1[%[[C0]]]{{.+}} : tensor<2xf32>, vector<2xf32>
// CHECK: %[[ADD0:.+]] = arith.addf %[[LHS0]], %[[READ]] : vector<2xf32>
// CHECK: %[[IS0:.+]] = vector.insert %[[ADD0]], %[[RINIT]] [0]
// CHECK: %[[ADD1:.+]] = arith.addf %[[LHS1]], %[[READ]] : vector<2xf32>
// CHECK: %[[IS1:.+]] = vector.insert %[[ADD1]], %[[IS0]] [1]
// CHECK: %[[ADD2:.+]] = arith.addf %[[LHS2]], %[[READ]] : vector<2xf32>
// CHECK: %[[IS2:.+]] = vector.insert %[[ADD2]], %[[IS1]] [2]
// CHECK: %[[ADD3:.+]] = arith.addf %[[LHS3]], %[[READ]] : vector<2xf32>
// CHECK: %[[IS3:.+]] = vector.insert %[[ADD3]], %[[IS2]] [3]
// CHECK: %[[T:.+]] = vector.transpose %[[IS3]], [1, 0] : vector<4x2xf32> to vector<2x4xf32>
// CHECK: %[[EXTRACT0:.+]] = vector.extract %[[T]][0]
// CHECK: %[[WRITE0:.+]] = vector.transfer_write %[[EXTRACT0]], %[[OINIT]][%[[C0]], %[[C0]]]
// CHECK: %[[EXTRACT1:.+]] = vector.extract %[[T]][1]
// CHECK: %[[WRITE1:.+]] = vector.transfer_write %[[EXTRACT1]], %[[WRITE0]][%[[C1]], %[[C0]]]
// CHECK: return %[[WRITE1]] : tensor<2x4xf32>
1 change: 1 addition & 0 deletions iree/compiler/Dialect/HAL/IR/HALBase.td
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
include "iree/compiler/Dialect/HAL/IR/HALDialect.td"
include "iree/compiler/Dialect/HAL/IR/HALInterfaces.td"
include "mlir/IR/AttrTypeBase.td"
include "mlir/IR/EnumAttr.td"

//===----------------------------------------------------------------------===//
// HAL enums
Expand Down
1 change: 1 addition & 0 deletions iree/compiler/Dialect/Stream/IR/StreamBase.td
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,7 @@ include "iree/compiler/Dialect/Stream/IR/StreamInterfaces.td"
include "iree/compiler/Dialect/Util/IR/UtilBase.td"
include "iree/compiler/Dialect/Util/IR/UtilInterfaces.td"
include "mlir/IR/AttrTypeBase.td"
include "mlir/IR/EnumAttr.td"
include "mlir/IR/SubElementInterfaces.td"

//===----------------------------------------------------------------------===//
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -26,9 +26,9 @@ stream.executable private @convert_store_i1 {
builtin.module {
func.func @dispatch(%arg0: !stream.binding) {
%c0 = arith.constant 0 : index
// CHECK-DAG: %[[TILE_I8:.+]] = arith.constant dense<[0, 0, 1, 1]> : tensor<4xi8>
// CHECK-DAG: %[[BINDING:.+]] = stream.binding.subspan {{.+}} -> !flow.dispatch.tensor<writeonly:4xi8>
%binding = stream.binding.subspan %arg0[%c0] : !stream.binding -> !flow.dispatch.tensor<writeonly:4xi1>
// CHECK-DAG: %[[TILE_I8:.+]] = arith.extui %cst : tensor<4xi1> to tensor<4xi8>
%cst = arith.constant dense<[false, false, true, true]> : tensor<4xi1>
// CHECK-NEXT: flow.dispatch.tensor.store %[[TILE_I8]], %[[BINDING]], {{.+}} : tensor<4xi8> -> !flow.dispatch.tensor<writeonly:4xi8>
flow.dispatch.tensor.store %cst, %binding, offsets = [0], sizes = [4], strides = [1] : tensor<4xi1> -> !flow.dispatch.tensor<writeonly:4xi1>
Expand Down Expand Up @@ -83,4 +83,4 @@ stream.executable private @convert_load_i33 {
return
}
}
}
}
1 change: 1 addition & 0 deletions iree/compiler/Dialect/Util/IR/UtilBase.td
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,7 @@
#ifndef IREE_DIALECT_UTIL_IR_UTIL_BASE
#define IREE_DIALECT_UTIL_IR_UTIL_BASE

include "mlir/IR/EnumAttr.td"
include "mlir/IR/OpBase.td"

//===----------------------------------------------------------------------===//
Expand Down
24 changes: 15 additions & 9 deletions iree/compiler/Dialect/Vulkan/IR/VulkanAttributes.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@
#include "iree/compiler/Dialect/Vulkan/IR/VulkanTypes.h"
#include "mlir/IR/AttributeSupport.h"
#include "mlir/IR/Builders.h"
#include "mlir/IR/BuiltinAttributes.h"
#include "mlir/IR/BuiltinTypes.h"
#include "mlir/IR/Diagnostics.h"
#include "mlir/IR/Location.h"
Expand Down Expand Up @@ -64,7 +65,7 @@ struct TargetEnvAttributeStorage : public AttributeStorage {
} // namespace detail

TargetEnvAttr TargetEnvAttr::get(Vulkan::Version version, uint32_t revision,
ArrayRef<Vulkan::Extension> extensions,
ArrayRef<Extension> extensions,
spirv::Vendor vendorID,
spirv::DeviceType deviceType,
uint32_t deviceID,
Expand All @@ -73,7 +74,7 @@ TargetEnvAttr TargetEnvAttr::get(Vulkan::Version version, uint32_t revision,
llvm::SmallVector<Attribute, 0> extAttrs;
extAttrs.reserve(extensions.size());
for (auto ext : extensions) {
extAttrs.push_back(builder.getStringAttr(Vulkan::stringifyExtension(ext)));
extAttrs.push_back(ExtensionAttr::get(builder.getContext(), ext));
}
return get(builder.getI32IntegerAttr(static_cast<uint32_t>(version)),
builder.getI32IntegerAttr(revision),
Expand Down Expand Up @@ -106,7 +107,7 @@ unsigned TargetEnvAttr::getRevision() {
TargetEnvAttr::ext_iterator::ext_iterator(ArrayAttr::iterator it)
: llvm::mapped_iterator<ArrayAttr::iterator, Extension (*)(Attribute)>(
it, [](Attribute attr) {
return *symbolizeExtension(attr.cast<StringAttr>().getValue());
return *symbolizeExtension(attr.cast<IntegerAttr>().getInt());
}) {}

TargetEnvAttr::ext_range TargetEnvAttr::getExtensions() {
Expand Down Expand Up @@ -141,12 +142,17 @@ LogicalResult TargetEnvAttr::verify(
if (!revision.getType().isInteger(32))
return emitError() << "expected 32-bit integer for revision";

if (!llvm::all_of(extensions.getValue(), [](Attribute attr) {
if (auto strAttr = attr.dyn_cast<StringAttr>())
if (symbolizeExtension(strAttr.getValue())) return true;
return false;
}))
return emitError() << "unknown extension in extension list";
for (Attribute attr : extensions.getValue()) {
auto intAttr = attr.dyn_cast<IntegerAttr>();
if (!intAttr || !intAttr.getType().isSignlessInteger()) {
return emitError() << "extension attribute '" << attr
<< "' should be 32-bit signless integer";
}
if (!symbolizeExtension(intAttr.getInt())) {
return emitError() << "unknown extension '" << attr
<< "' in extension list";
}
}

if (!capabilities.isa<CapabilitiesAttr>()) {
return emitError() << "expected vulkan::CapabilitiesAttr for capabilities";
Expand Down
30 changes: 14 additions & 16 deletions iree/compiler/Dialect/Vulkan/IR/VulkanBase.td
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
#define IREE_DIALECT_VULKAN_BASE

include "mlir/IR/OpBase.td"
include "mlir/IR/EnumAttr.td"

//===----------------------------------------------------------------------===//
// Vulkan dialect definition
Expand Down Expand Up @@ -45,9 +46,6 @@ class VK_IsKnownBitEnumCaseFor<string name> :
class VK_IsKnownIntEnumCaseFor<string name> :
CPred<"::mlir::iree_compiler::IREE::Vulkan::symbolize" # name # "("
"$_self.cast<IntegerAttr>().getValue().getZExtValue()).hasValue()">;
class VK_IsKnownStrEnumCaseFor<string name> :
CPred<"::mlir::iree_compiler::IREE::Vulkan::symbolize" # name # "("
"$_self.cast<StringAttr>().getValue()).hasValue()">;

// Wrapper over base I32BitEnumAttr to set common fields.
class VK_BitEnumAttr<string name, string description,
Expand All @@ -65,11 +63,11 @@ class VK_I32EnumAttr<string name, string description,
let cppNamespace = "::mlir::iree_compiler::IREE::Vulkan";
}

// Wrapper over base StrEnumAttr to set common fields.
class VK_StrEnumAttr<string name, string description,
list<StrEnumAttrCase> cases> :
StrEnumAttr<name, description, cases> {
let predicate = And<[StrAttr.predicate, VK_IsKnownStrEnumCaseFor<name>]>;
// Wrapper over base I32EnumAttr to set common fields for mimicing StrEnumAttr.
class VK_EnumAttr<string name, string description,
list<I32EnumAttrCase> cases> :
EnumAttr<VK_Dialect, I32EnumAttr<name, description, cases>, name> {
let predicate = And<[StrAttr.predicate, VK_IsKnownIntEnumCaseFor<name>]>;
let cppNamespace = "::mlir::iree_compiler::IREE::Vulkan";
}

Expand All @@ -84,16 +82,16 @@ def VK_V_1_2 : I32EnumAttrCase<"V_1_2", 2, "v1.2">;
def VK_VersionAttr : VK_I32EnumAttr<"Version", "valid Vulkan version", [
VK_V_1_0, VK_V_1_1, VK_V_1_2]>;

def VK_KHR_16bit_storage : StrEnumAttrCase<"VK_KHR_16bit_storage">;
def VK_KHR_8bit_storage : StrEnumAttrCase<"VK_KHR_8bit_storage">;
def VK_KHR_shader_float16_int8 : StrEnumAttrCase<"VK_KHR_shader_float16_int8">;
def VK_KHR_spirv_1_4 : StrEnumAttrCase<"VK_KHR_spirv_1_4">;
def VK_KHR_storage_buffer_storage_class : StrEnumAttrCase<"VK_KHR_storage_buffer_storage_class">;
def VK_KHR_variable_pointers: StrEnumAttrCase<"VK_KHR_variable_pointers">;
def VK_NV_cooperative_matrix : StrEnumAttrCase<"VK_NV_cooperative_matrix">;
def VK_KHR_16bit_storage : I32EnumAttrCase<"VK_KHR_16bit_storage", 0>;
def VK_KHR_8bit_storage : I32EnumAttrCase<"VK_KHR_8bit_storage", 1>;
def VK_KHR_shader_float16_int8 : I32EnumAttrCase<"VK_KHR_shader_float16_int8", 2>;
def VK_KHR_spirv_1_4 : I32EnumAttrCase<"VK_KHR_spirv_1_4", 3>;
def VK_KHR_storage_buffer_storage_class : I32EnumAttrCase<"VK_KHR_storage_buffer_storage_class", 4>;
def VK_KHR_variable_pointers: I32EnumAttrCase<"VK_KHR_variable_pointers", 5>;
def VK_NV_cooperative_matrix : I32EnumAttrCase<"VK_NV_cooperative_matrix", 6>;

def VK_ExtensionAttr :
VK_StrEnumAttr<"Extension", "supported Vulkan extension", [
VK_EnumAttr<"Extension", "supported Vulkan extension", [
VK_KHR_16bit_storage, VK_KHR_8bit_storage, VK_KHR_shader_float16_int8,
VK_KHR_spirv_1_4, VK_KHR_storage_buffer_storage_class,
VK_KHR_variable_pointers, VK_NV_cooperative_matrix
Expand Down
8 changes: 5 additions & 3 deletions iree/compiler/Dialect/Vulkan/IR/VulkanDialect.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -93,8 +93,9 @@ Attribute parseTargetAttr(DialectAsmParser &parser) {
StringRef errorKeyword;

auto processExtension = [&](llvm::SMLoc loc, StringRef extension) {
if (symbolizeExtension(extension)) {
extensions.push_back(builder.getStringAttr(extension));
if (auto symbol = symbolizeExtension(extension)) {
extensions.push_back(builder.getI32IntegerAttr(
static_cast<uint32_t>(symbol.getValue())));
return success();
}
return errorloc = loc, errorKeyword = extension, failure();
Expand Down Expand Up @@ -190,7 +191,8 @@ void print(TargetEnvAttr targetEnv, DialectAsmPrinter &printer) {
<< stringifyVersion(targetEnv.getVersion()) << ", r("
<< targetEnv.getRevision() << "), [";
interleaveComma(targetEnv.getExtensionsAttr(), os, [&](Attribute attr) {
os << attr.cast<StringAttr>().getValue();
os << stringifyExtension(
*symbolizeExtension(attr.cast<IntegerAttr>().getInt()));
});
printer << "], " << spirv::stringifyVendor(targetEnv.getVendorID());
printer << ":" << spirv::stringifyDeviceType(targetEnv.getDeviceType());
Expand Down
4 changes: 2 additions & 2 deletions iree/compiler/Dialect/Vulkan/Utils/TargetTriple.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -103,7 +103,7 @@ Vulkan::Version getVersion(const TargetTriple &triple) {
/// version. The GPU triple is a handy way to specify the target but we cannot
/// encode all the information in the triple.
void getExtensions(const TargetTriple &triple,
llvm::SmallVectorImpl<Vulkan::Extension> &extensions) {
llvm::SmallVectorImpl<Extension> &extensions) {
// Mobile GPUs need to take Android version into consideration.
switch (triple.getArch()) {
case TargetTripleArch::Apple_M1: {
Expand Down Expand Up @@ -396,7 +396,7 @@ std::string TargetTriple::getTriple() const {
}

TargetEnvAttr TargetTriple::getTargetEnv(MLIRContext *context) const {
SmallVector<Vulkan::Extension> extensions;
SmallVector<Extension> extensions;
getExtensions(*this, extensions);
return TargetEnvAttr::get(getVersion(*this), /*revision=*/0, extensions,
getVendor(*this), getDeviceType(*this),
Expand Down
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