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In general, when should we create a class or function in dart/ROHD during the design? Any rule of thumb or best practices? |
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From ROHD's perspective, one time when you do want to make a class is when you want to define a SystemVerilog uses ROHD, as a generator framework, enables you to write software that generates hardware. You can use any types of software collections, architectures, design patterns, etc. including classes and functions to develop your hardware. The only time you need to explicitly define a So to summarize, make a |
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From ROHD's perspective, one time when you do want to make a class is when you want to define a
Module
(e.g.class ___ extends Module
). When you want something to be aModule
is sometimes similar to when you want to make something amodule
in SystemVerilog. For example, a top-level hierarchy or backend synthesis partition should be aModule
. AModule
always translates into amodule
when converted to SystemVerilog.SystemVerilog uses
module
s andfunction
s as common ways to group functionality. In ROHD, you are not limited to onlyModule
s to group reusable functionality, and ROHD will not generate a SystemVerilogfunction
.ROHD, as a generator framework, enables you to write software that g…