Revert unintended changes.

intel · Nov 16, 2023 · bbe117e · bbe117e
1 parent a082e62
commit bbe117e
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Showing 4 changed files with 16 additions and 13 deletions.
diff --git a/lib/Conversion/XeGPUToSPIRV/XeGPUToSPIRV.cpp b/lib/Conversion/XeGPUToSPIRV/XeGPUToSPIRV.cpp
@@ -219,6 +219,10 @@ void lookupOrInsertIntrinsic(ConversionPatternRewriter &rewriter, Operation *op,
   }
 }
 
+/// @brief
+/// convert the tensor descriptor to [2xi64] which is of the format
+/// -> [base pointer: i64, offsetX: i32, offsetY: i32] for 2D tensor desc
+/// -> [base pointer: i64, unused] for 1D and scattered tensor desc
 class CreateNdDescToVCPattern : public OpConversionPattern<CreateNdDescOp> {
 public:
   using OpConversionPattern<CreateNdDescOp>::OpConversionPattern;
@@ -494,7 +498,7 @@ class LoadStorePrefetchNdToLsc : public OpConversionPattern<OpType> {
   }
 };
 
-xegpu::CreateNdDescOp findDescOp(mlir::Value val) {
+std::optional<xegpu::CreateNdDescOp> findDescOp(mlir::Value val) {
   if (auto op = val.getDefiningOp()) {
     if (auto descOp = dyn_cast<xegpu::CreateNdDescOp>(op)) {
       return descOp;
@@ -506,9 +510,9 @@ xegpu::CreateNdDescOp findDescOp(mlir::Value val) {
     auto forOp = cast<scf::ForOp>(ownerOp);
     auto init = forOp.getInits()[arg.getArgNumber() - 1];
     return findDescOp(init);
-  } else {
-    assert(0 && "add more support");
   }
+  // Add more support
+  return std::nullopt;
 }
 
 template <typename OpType>
@@ -602,8 +606,12 @@ class LoadStorePrefetchNdToRawSend : public OpConversionPattern<OpType> {
     }
     auto msg = createIntConstant(i32Type, rawSendMsg);
     // payload
+    // payload is v8i32 = [base:i64, surfaceWidth:i32, surfaceHeight:i32,
+    // surefacePitch:i32, offsetX:i32, offsetY:i32, blockInfo:i32]
+    // the base/surfaceInfo/blockInfo are staticly from the tensor desc
+    // while the offsetX/Y are dynamicly udpated
     auto insertPoint = rewriter.saveInsertionPoint();
-    CreateNdDescOp createDescOp = findDescOp(op.template getTensorDesc());
+    CreateNdDescOp createDescOp = *findDescOp(op.template getTensorDesc());
     rewriter.setInsertionPointAfter(createDescOp);
     auto v8i32 = VectorType::get(8, i32Type);
     auto v4i64 = VectorType::get(4, i64Type);

diff --git a/lib/Conversion/XeTileToXeGPU/SCFOpConversion.cpp b/lib/Conversion/XeTileToXeGPU/SCFOpConversion.cpp
@@ -100,7 +100,7 @@ bool isLegalSCFOp(mlir::Operation *op) {
 
   if (llvm::isa<mlir::scf::YieldOp>(op)) {
     auto yieldOp = llvm::cast<mlir::scf::YieldOp>(op);
-    for (auto arg : yieldOp.getResults()) {
+    for (const auto &arg : yieldOp.getResults()) {
       auto type = arg.getType();
       result &= !type.isa<imex::xetile::TileType>();
       if (type.isa<mlir::VectorType>())

diff --git a/lib/Conversion/XeTileToXeGPU/XeTileOpConversion.cpp b/lib/Conversion/XeTileToXeGPU/XeTileOpConversion.cpp
@@ -318,7 +318,7 @@ struct SgUpdateTileOffsetOpPattern
     auto tiles = adaptor.getTile();
 
     llvm::SmallVector<mlir::Value> xegpuOps;
-    for (auto tile : tiles) {
+    for (const auto &tile : tiles) {
       auto xegpuTile = rewriter.create<xegpu::UpdateNDOffsetOp>(
           op.getLoc(), tile.getType(), tile, mlir::ValueRange{offsetX, offsetY},
           imex::xegpu::Mode::VC);

diff --git a/test/Integration/Dialect/XeGPU/lit.local.cfg b/test/Integration/Dialect/XeGPU/lit.local.cfg
@@ -1,8 +1,3 @@
-local_excludes = [
-                    'gemm_1024x1024xf16.mlir',
-                    'gemm_1024x1016x1016_f16_f16_f32.mlir',
-                    'load2d_dpas_store2d.mlir',
-                    'load2d-padding-f32.mlir',
-                    'load2d-padding.mlir'
-                 ]
+local_excludes = ['gemm_1024x1024xf16.mlir']
+
 config.excludes.update(local_excludes)