Fix coverity

intel · Nov 15, 2023 · 8d4ecbd · 8d4ecbd
1 parent 00f5d7f
commit 8d4ecbd
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Showing 2 changed files with 4 additions and 5 deletions.
diff --git a/lib/Conversion/XeGPUToSPIRV/XeGPUToSPIRV.cpp b/lib/Conversion/XeGPUToSPIRV/XeGPUToSPIRV.cpp
@@ -510,10 +510,9 @@ std::optional<xegpu::CreateNdDescOp> findDescOp(mlir::Value val) {
     auto forOp = cast<scf::ForOp>(ownerOp);
     auto init = forOp.getInits()[arg.getArgNumber() - 1];
     return findDescOp(init);
-  } else {
-    assert(0 && "add more support");
-    return std::nullopt;
-  }
+  } 
+  // Add more support
+  return std::nullopt;
 }
 
 template <typename OpType>

diff --git a/lib/Conversion/XeTileToXeGPU/SCFOpConversion.cpp b/lib/Conversion/XeTileToXeGPU/SCFOpConversion.cpp
@@ -100,7 +100,7 @@ bool isLegalSCFOp(mlir::Operation *op) {
 
   if (llvm::isa<mlir::scf::YieldOp>(op)) {
     auto yieldOp = llvm::cast<mlir::scf::YieldOp>(op);
-    for (const auto arg : yieldOp.getResults()) {
+    for (const auto &arg : yieldOp.getResults()) {
       auto type = arg.getType();
       result &= !type.isa<imex::xetile::TileType>();
       if (type.isa<mlir::VectorType>())