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BRUCE11111 committed May 27, 2024
1 parent f40e433 commit bccf326
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30 changes: 30 additions & 0 deletions include/gc/Transforms/Passes.td
Original file line number Diff line number Diff line change
Expand Up @@ -31,4 +31,34 @@ def ConvertOneDNNGraphToLinalg : Pass<"convert-onednn-graph-to-linalg"> {
];
}

def LowerToTileVector : Pass<"lower-to-tile-vector"> {
let summary = "Lower tensor to tile vector.";
let description = [{
Lower tensor to tile vector form.
}];
let dependentDialects = [
"::mlir::func::FuncDialect",
"::mlir::math::MathDialect",
"::mlir::arith::ArithDialect",
"::mlir::tensor::TensorDialect",
"::mlir::linalg::LinalgDialect",
"::mlir::vector::VectorDialect",
];
}

def CPUPhysicalRegisterPass : Pass<"CPU-physical-register-pass", "func::FuncOp"> {
let summary = "Lower operation to cpu pysical register size.";
let description = [{
Physical register size lowering pass.
}];
let dependentDialects = [
"::mlir::func::FuncDialect",
"::mlir::math::MathDialect",
"::mlir::arith::ArithDialect",
"::mlir::tensor::TensorDialect",
"::mlir::vector::VectorDialect",
"::mlir::scf::SCFDialect",
];
}

#endif // GC_DIALECT_GC_PASSES
2 changes: 2 additions & 0 deletions lib/gc/Transforms/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -7,6 +7,8 @@ gc_set_mlir_link_components(MLIR_LINK_COMPONENTS
add_mlir_library(GCPasses
OneDNNGraphToLinalg.cpp
TileNamed.cpp
LowerTileVectorPass.cpp
CPUPhysicalResigterPass.cpp

ADDITIONAL_HEADER_DIRS
${PROJECT_SOURCE_DIR}/include
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