Block at end of LPI2C embedded-hal transactions #165
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
mciantyre
force-pushed
the
lpi2c-blocking
branch
from
b317ee2 to
0e8779a
Compare
Wait for the controller to become idle before returning to the transaction caller. This is a stronger guarantee than waiting until the stop bit is sent, and it meets the EH1 interface requirements. This commit still keeps the busy check at the start of the transactions. If the bus is busy due to another controller's activity, I don't think we should block the caller while the other controller uses the bus. The caller can implement a retry policy given the characteristics of their system. EH1 lets users handle this condition with a dedicated error kind. Additionally, this commit keeps the FIFO flushes at the start of transactions, after the busy checks. This is intended to avoid surprises in case a user inserts a high-level transaction somewhere in their low-level command sequence. I updated one of the I2C examples to blast a device through the eh02 interfaces. It behaved reasonably on a Teensy 4 setup.
Re-tested with the previous commit, and the example still behaves reasonably.
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Wait for the controller to become idle before returning to the transaction caller. This is a stronger guarantee than waiting until the stop bit is sent, and it meets the EH1 interface requirements.
This commit still keeps the busy check at the start of the transactions. If the bus is busy due to another controller's activity, I don't think we should block the caller while the other controller uses the bus. The caller can implement a retry policy given the characteristics of their system. EH1 lets users handle this condition with a dedicated error kind.
Additionally, this commit keeps the FIFO flushes at the start of transactions, after the busy checks. This is intended to avoid surprises in case a user inserts a high-level transaction somewhere in their low-level command sequence.
I updated one of the I2C examples to blast a device through the eh02 interfaces. It behaved reasonably on a Teensy 4 setup.