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| /** | ||
| * @file apic.cpp | ||
| * @brief APIC 抽象 | ||
| * @author Zone.N ([email protected]) | ||
| * @version 1.0 | ||
| * @date 2021-09-18 | ||
| * @copyright MIT LICENSE | ||
| * https://github.com/Simple-XX/SimpleKernel | ||
| * @par change log: | ||
| * <table> | ||
| * <tr><th>Date<th>Author<th>Description | ||
| * <tr><td>2021-09-18<td>digmouse233<td>迁移到 doxygen | ||
| * </table> | ||
| */ | ||
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| #include "stdio.h" | ||
| #include "assert.h" | ||
| #include "intr.h" | ||
| #include "cpu.hpp" | ||
| #include "apic.h" | ||
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| // 64-ia-32-architectures-software-developer-vol-3a-manual#10 | ||
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| /// @todo 完善，加入内核 | ||
| APIC::APIC(void) { | ||
| return; | ||
| } | ||
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| APIC::~APIC(void) { | ||
| return; | ||
| } | ||
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| /// @see 64-ia-32-architectures-software-developer-vol-3a-manual#10.4.3 | ||
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| int32_t APIC::init(void) { | ||
| LOCAL_APIC::init(); | ||
| IO_APIC::init(); | ||
| info("apic init.\n"); | ||
| return 0; | ||
| } |
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| /** | ||
| * @file apic.h | ||
| * @brief APIC 抽象头文件 | ||
| * @author Zone.N ([email protected]) | ||
| * @version 1.0 | ||
| * @date 2021-09-18 | ||
| * @copyright MIT LICENSE | ||
| * https://github.com/Simple-XX/SimpleKernel | ||
| * @par change log: | ||
| * <table> | ||
| * <tr><th>Date<th>Author<th>Description | ||
| * <tr><td>2021-09-18<td>digmouse233<td>迁移到 doxygen | ||
| * </table> | ||
| */ | ||
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| #ifndef _APIC_H_ | ||
| #define _APIC_H_ | ||
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| #include "stdint.h" | ||
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| /** | ||
| * @brief APIC 抽象 | ||
| */ | ||
| class APIC { | ||
| private: | ||
| protected: | ||
| public: | ||
| APIC(void); | ||
| ~APIC(void); | ||
| static int32_t init(void); | ||
| }; | ||
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| /** | ||
| * @brief 本地 APIC | ||
| */ | ||
| class LOCAL_APIC { | ||
| private: | ||
| protected: | ||
| public: | ||
| LOCAL_APIC(void); | ||
| ~LOCAL_APIC(void); | ||
| static int32_t init(void); | ||
| }; | ||
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| /** | ||
| * @brief IO APIC | ||
| */ | ||
| class IO_APIC { | ||
| private: | ||
| protected: | ||
| public: | ||
| IO_APIC(void); | ||
| ~IO_APIC(void); | ||
| static int32_t init(void); | ||
| }; | ||
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| static APIC apic; | ||
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| #endif /* _APIC_H_ */ |
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| /** | ||
| * @file io_apic.cpp | ||
| * @brief IOAPIC 抽象 | ||
| * @author Zone.N ([email protected]) | ||
| * @version 1.0 | ||
| * @date 2021-09-18 | ||
| * @copyright MIT LICENSE | ||
| * https://github.com/Simple-XX/SimpleKernel | ||
| * @par change log: | ||
| * <table> | ||
| * <tr><th>Date<th>Author<th>Description | ||
| * <tr><td>2021-09-18<td>digmouse233<td>迁移到 doxygen | ||
| * </table> | ||
| */ | ||
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| #include "intr.h" | ||
| #include "cpu.hpp" | ||
| #include "io.h" | ||
| #include "apic.h" | ||
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| /// @todo | ||
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| IO_APIC::IO_APIC(void) { | ||
| return; | ||
| } | ||
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| IO_APIC::~IO_APIC(void) { | ||
| return; | ||
| } | ||
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| int32_t IO_APIC::init(void) { | ||
| info("io apic init.\n"); | ||
| return 0; | ||
| } |
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| /** | ||
| * @file loacl_apic.cpp | ||
| * @brief loacl APIC 抽象 | ||
| * @author Zone.N ([email protected]) | ||
| * @version 1.0 | ||
| * @date 2021-09-18 | ||
| * @copyright MIT LICENSE | ||
| * https://github.com/Simple-XX/SimpleKernel | ||
| * @par change log: | ||
| * <table> | ||
| * <tr><th>Date<th>Author<th>Description | ||
| * <tr><td>2021-09-18<td>digmouse233<td>迁移到 doxygen | ||
| * </table> | ||
| */ | ||
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| #include "stdio.h" | ||
| #include "assert.h" | ||
| #include "intr.h" | ||
| #include "cpu.hpp" | ||
| #include "apic.h" | ||
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| /// @see 64-ia-32-architectures-software-developer-vol-3a-manual#10 | ||
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| /// @todo 完善，加入内核 | ||
| LOCAL_APIC::LOCAL_APIC(void) { | ||
| return; | ||
| } | ||
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| LOCAL_APIC::~LOCAL_APIC(void) { | ||
| return; | ||
| } | ||
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| /// @see 64-ia-32-architectures-software-developer-vol-3a-manual#10.4.3 | ||
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| int32_t LOCAL_APIC::init(void) { | ||
| // 先判断 cpu 是否支持 | ||
| CPU::CPUID cpuid; | ||
| if (cpuid.xapic() == false) { | ||
| warn("Not support LOCAL_APIC&xAPIC.\n"); | ||
| } | ||
| if (cpuid.x2apic() == false) { | ||
| warn("Not support x2APIC.\n"); | ||
| } | ||
| uint64_t msr = CPU::READ_MSR(CPU::IA32_APIC_BASE); | ||
| // 开启 xAPIC 与 x2APIC | ||
| msr |= (CPU::IA32_APIC_BASE_GLOBAL_ENABLE_BIT | | ||
| CPU::IA32_APIC_BASE_X2APIC_ENABLE_BIT); | ||
| CPU::WRITE_MSR(CPU::IA32_APIC_BASE, msr); | ||
| // 设置 SIVR | ||
| msr = CPU::READ_MSR(CPU::IA32_X2APIC_SIVR); | ||
| if (cpuid.eoi() == true) { | ||
| msr |= CPU::IA32_X2APIC_SIVR_EOI_ENABLE_BIT; | ||
| } | ||
| msr |= CPU::IA32_X2APIC_SIVR_APIC_ENABLE_BIT; | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_SIVR, msr); | ||
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| // 屏蔽所有 LVT | ||
| msr = 0; | ||
| msr |= CPU::IA32_X2APIC_LVT_MASK_BIT; | ||
| msr = 0x10000; | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_CMCI, msr); | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_LVT_TIMER, msr); | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_LVT_THERMAL, msr); | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_LVT_PMI, msr); | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_LVT_LINT0, msr); | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_LVT_LINT1, msr); | ||
| CPU::WRITE_MSR(CPU::IA32_X2APIC_LVT_ERROR, msr); | ||
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| info("local apic init.\n"); | ||
| return 0; | ||
| } |
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