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1. SPI_MS SPI_MS Public

   Final Project - Fa23 (a “SPI_MS Chip” that allows full-duplex, synchronous, serial communication between the Chip and peripherals.)

   SystemVerilog 4

2. E203_CNN_Genesys2 E203_CNN_Genesys2 Public

   Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.

   VHDL 10

3. MIT_6.175_6.375_Lab MIT_6.175_6.375_Lab Public

   MIT 6.004 6.175 6.375 course, notes, Lab and Project. digital design and computer architecture.

   C 1

4. Digital_IC_Design_23fall Digital_IC_Design_23fall Public

   Here are some assignments for digital integrated circuit design in the fall of 2023.Welcome to communicate and star.

   Verilog 2

5. Embedded_Microprocessor_System_24Spring Embedded_Microprocessor_System_24Spring Public

   2024 Spring Semester Embedded Microprocessor System Assignment School of Software and Microelectronics, Peking University.

   Assembly 3 1

6. Software_Hardware_Co-Design_24Spring Software_Hardware_Co-Design_24Spring Public

   Hardware and software collaborative design labs and project in the spring semester of 2024

   Verilog 2