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B_Router_Mesh5x5.v
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Verilog-Bsed-NoC-Simulator

Verilog-Bsed-NoC-Simulator

If you use our Open Source Verilog-Bsed-NoC-Simulator in your research, we would appreciate the following citation in any publications to which it has contributed:

  1. H. El-Sayed, M. Ragab, M. S. Sayed and V. Goulart, "Hardware implementation and evaluation of the Flexible router architecture for NoCs," Electronics, Circuits, and Systems (ICECS), 2013 IEEE 20th International Conference on, Abu Dhabi, 2013, pp. 621-624. doi: 10.1109/ICECS.2013.6815491

  2. H. Hassan, A. Shalaby and H. Kim, "DPSB: Dual port shared buffer mechanism for efficient buffer utilization in Network on Chip routers," 2015 International SoC Design Conference (ISOCC), Gyungju, 2015, pp. 135-136. doi: 10.1109/ISOCC.2015.7401695

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