Beta 56 update

src/CMakeLists.txt

@@ -53,7 +53,7 @@ set( CMAKE_C_FLAGS "${CMAKE_C_FLAGS} --specs=nano.specs --specs=nosys.specs -u _
 
 #set( CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -Wl,--print-gc-sections -Wl,-unresolved-symbols=ignore-in-object-files -Wl,-T,${PROJECT_SOURCE_DIR}/rpi.ld" )
 
-set( CMAKE_EXE_LINKER_FLAGS "-Wl,--gc-sections -Wl,-T,${PROJECT_SOURCE_DIR}/rpi.ld" )
+set( CMAKE_EXE_LINKER_FLAGS "-Wl,--no-warn-rwx-segments,--gc-sections -Wl,-T,${PROJECT_SOURCE_DIR}/rpi.ld" )
 
 
 file( GLOB core_files

src/armc-cstubs.c

@@ -123,7 +123,7 @@ int _fstat(int file, struct stat *st)
 /* Process-ID; this is sometimes used to generate strings unlikely to conflict
  with other processes. Minimal implementation, for a system without
  processes: */
-int getpid(void)
+int _getpid(void)
 {
   return 1;
 }
@@ -137,7 +137,7 @@ int _isatty(int file)
 }
 
 /* Send a signal. Minimal implementation: */
-int kill(int pid, int sig)
+int _kill(int pid, int sig)
 {
   errno = EINVAL;
   return -1;
@@ -157,7 +157,7 @@ int _lseek(int file, int ptr, int dir)
 }
 
 /* Open a file. Minimal implementation: */
-int open(const char *name, int flags, int mode)
+int _open(const char *name, int flags, int mode)
 {
   return -1;
 }

src/capture_line_ntsc_8bpp.S

@@ -27,10 +27,8 @@ skip_psync_loop_no_oldL\@:
 #else
 
 .macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC
+        mov    r8, #4                    //adds 4 to capture length
         SKIP_PSYNC_COMMON_NO_OLD_CPLD
-        add    r8, r7, r1
-        add    r8, r8, #4
-        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
         mov    r9, #0
 skip_psync_loop_no_oldL6\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync
@@ -47,10 +45,8 @@ skip_psync_loop_no_oldL6\@:
 .endm
 
 .macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC_3BPP
+        mov    r8, #2                    //adds 2 to capture length
         SKIP_PSYNC_COMMON_NO_OLD_CPLD
-        add    r8, r7, r1
-        add    r8, r8, #2
-        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
         mov    r9, #0
 skip_psync_loop_no_oldL3\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync

src/cpld_rgb.c

@@ -1828,7 +1828,15 @@ static void cpld_calibrate_sub(capture_info_t *capinfo, int elk, int (*raw_metri
    if (!oddeven) {  // if mode 7 cpld using odd/even then let caller set config->half_px_delay as it is actually a quarter pixel delay
       config->half_px_delay = 0;
    }
-   config->full_px_delay = 0;
+   int temp_delay;
+   if (capinfo->mode7) { //dummy calls to alignment to detect bbc or non bbc profile
+      temp_delay = analyze_mode7_alignment(capinfo);
+   } else {
+      temp_delay = analyze_default_alignment(capinfo);
+   }
+   if (temp_delay >= 0) {          //if >=0 then bbc profile
+      config->full_px_delay = 0;   //so set offset to 0 for alignment calibration
+   }
    msgptr = 0;
    msgptr += sprintf(msg, "INFO:                      ");
    for (int i = 0; i < NUM_OFFSETS; i++) {

src/cpld_simple.c

@@ -1,4 +1,5 @@
 #include <stdio.h>
+#include <stdint.h>
 #include "defs.h"
 #include "cpld.h"
 #include "rgb_to_fb.h"

src/defs.h

@@ -117,7 +117,7 @@
 #define RET_EXPIRED                0x10
 #define RET_INTERLACE_CHANGED      0x20
 #define RET_SYNC_TIMING_CHANGED    0x40
-#define RET_VSYNC_POLARITY_CHANGED 0x80
+#define RET_SYNC_POLARITY_CHANGED  0x80
 #define RET_SYNC_STATE_CHANGED    0x100
 
 //paletteFlags
@@ -371,7 +371,7 @@ typedef struct {
 #define EQUALISING_THRESHOLD 3400      // equalising pulses are half sync pulse length and must be filtered out
 #define FRAME_MINIMUM 10000000         // 10ms
 #define FRAME_TIMEOUT 30000000         // 30ms which is over a frame / field @ 50Hz (20ms)
-#define LINE_MINIMUM 20000             // 20uS
+#define LINE_MINIMUM 10000             // 10uS
 #define HSYNC_SCROLL_LO (4000 - 224)
 #define HSYNC_SCROLL_HI (4000 + 224)
 
@@ -578,10 +578,22 @@ typedef struct {
 #define  MODE_SET1       0
 #define  MODE_SET2       1
 
+#define  SYNC_ABORT_FLAG   0x80000000
+#define  LEADING_SYNC_FLAG 0x00010000
 #define  SIMPLE_SYNC_FLAG  0x00008000
 #define  HIGH_LATENCY_FLAG 0x00004000
 #define  OLD_FIRMWARE_FLAG 0x00002000
+
+#define  CPLD_NORMAL      0
+#define  CPLD_BLANK       1
+#define  CPLD_UNKNOWN     2
+#define  CPLD_WRONG       3
+#define  CPLD_MANUAL      4
+#define  CPLD_UPDATE      5
+#define  CPLD_NOT_FITTED  6
+
 #endif
 
 #define Bit32u uint32_t
-#define Bit8u uint8_t
+#define Bit8u uint8_t
+#define Bitu uint32_t

src/fatfs/sdcard.c

@@ -32,7 +32,9 @@
 #include <stdio.h>
 #include <string.h>
 #include <stdlib.h>
+#include <stdint.h>
 #include <inttypes.h>
+#include <unistd.h>
 #include "block.h"
 
 #include "../rpi-systimer.h"

src/filesystem.c

@@ -1,6 +1,7 @@
 #include <stdio.h>
 #include <stdlib.h>
 #include <string.h>
+#include <stdint.h>
 #include "logging.h"
 #include "fatfs/ff.h"
 #include "filesystem.h"
@@ -115,7 +116,7 @@ static int generate_png(capture_info_t *capinfo, uint8_t **png, unsigned int *pn
        uint8_t *pp = png_buffer;
 
            if (png_top != 0) {
-               for (int i = 0; i < (png_top * (png_left + width + png_right)); i += (hdouble + 1)) {
+               for (int i = 0; i < (png_top * (png_left + png_width + png_right)); i++) {
                     *pp++ = 0;
                     *pp++ = 0;
                     *pp++ = 0;
@@ -127,7 +128,7 @@ static int generate_png(capture_info_t *capinfo, uint8_t **png, unsigned int *pn
                 for (int sy = 0; sy < vscale; sy++) {
                     uint8_t *fp = capinfo->fb + capinfo->pitch * y;
                     if (png_left != 0) {
-                        for (int x = 0; x < png_left; x += (hdouble + 1)) {
+                        for (int x = 0; x < png_left; x++) {
                             *pp++ = 0;
                             *pp++ = 0;
                             *pp++ = 0;
@@ -159,7 +160,7 @@ static int generate_png(capture_info_t *capinfo, uint8_t **png, unsigned int *pn
                         }
                     }
                     if (png_right != 0) {
-                        for (int x = 0; x < png_right; x += (hdouble + 1)) {
+                        for (int x = 0; x < png_right; x++) {
                             *pp++ = 0;
                             *pp++ = 0;
                             *pp++ = 0;
@@ -169,7 +170,7 @@ static int generate_png(capture_info_t *capinfo, uint8_t **png, unsigned int *pn
                 }
            }
            if (png_bottom != 0) {
-               for (int i = 0; i < (png_bottom * (png_left + width + png_right)); i += (hdouble + 1)) {
+               for (int i = 0; i < (png_bottom * (png_left + png_width + png_right)); i++) {
                    *pp++ = 0;
                    *pp++ = 0;
                    *pp++ = 0;

src/geometry.c

@@ -867,17 +867,24 @@ void geometry_get_fb_params(capture_info_t *capinfo) {
         int apparent_height = get_vdisplay();
         double_width = (capinfo->sizex2 & SIZEX2_DOUBLE_WIDTH) >> 1;
         double_height = capinfo->sizex2 & SIZEX2_DOUBLE_HEIGHT;
-
+        hscale >>= double_width;
         if (_get_hardware_id() == _RPI && capinfo->bpp == 16 && !uneven) {
             if (get_gscaling() == GSCALING_INTEGER) {
                 int actual_width = (capinfo->chars_per_line << 3);
                 int actual_height = capinfo->nlines;
                 left = (apparent_width - (actual_width * hscale)) / 2;
-                right = left;
                 top = (apparent_height - (actual_height * vscale)) / 2;
-                bottom = top;
-                capinfo->width = actual_width << double_width;
-                capinfo->height = actual_height << double_height;
+                if (left >=0 && top >=0) {
+                    right = left;
+                    bottom = top;
+                    capinfo->width = actual_width;
+                    capinfo->height = actual_height << double_height;
+                } else {
+                    left = 0;
+                    right = 0;
+                    top = 0;
+                    bottom = 0;
+                }
                 //log_info("sizes = %d %d %d %d %d %d %d %d %d %d", apparent_width,apparent_height,actual_width, actual_height ,hscale,vscale,left,right,top,bottom);
             } else {
                 top = 0;

src/jtag/update_cpld.c

@@ -1,4 +1,5 @@
 #include <stdio.h>
+#include <stdint.h>
 #include "../filesystem.h"
 #include "../logging.h"
 #include "../osd.h"

src/logging.c

@@ -1,5 +1,6 @@
 #include <stdio.h>
 #include <stdarg.h>
+#include <stdint.h>
 #include "logging.h"
 #include "filesystem.h"
 

src/macros.S

@@ -412,19 +412,35 @@ clear_regs\@:
         str    r8, [r10, r14]
         subs   r14, r14, #4
         bpl    clear_regs\@
-        ldr    r10, =GPU_workspace
-        str    r8, [r10]
-        str    r8, [r10, #4]
+        ldr    r14, =GPU_workspace
+        str    r8, [r14]
+        str    r8, [r14, #4]
 .endm
 
-.macro  SKIP_PSYNC_COMMON_NO_OLD_CPLD
+.macro  SETUP_GPU_CAPTURE_CPLD
+        push   {r8}
         SETUP_GPU_CAPTURE
+        add    r8, r7, r1                  //now r8 is total samples to capture (offset + video)
+        tst    r3, #BIT_NO_H_SCROLL        // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
+        addeq  r8, r8, #2                  // add 2 extra samples when hscrolling to allow for shift
+        tst    r3, #BIT_HSYNC_EDGE         // if leading edge then don't wait for end of hsync (means scroll detection won't work)
+        addne  r8, r7, r1                  //restore r8 if leading edge as no sideways scrolling allowed
+        orrne  r8, #LEADING_SYNC_FLAG
+        pop    {r14}
+        add    r8, r8, r14                 // adds in extra flags such as high latency capture or additional psync counts used in NTSC artfact capture
+        str    r8, [r10]  //command register
+.endm
+
+.macro  SKIP_PSYNC_COMMON_NO_OLD_CPLD
+        //enters with R8 containing extra gpu flags such as high latency or additional psync counts used in NTSC artfact capture
+        SETUP_GPU_CAPTURE_CPLD
         WAIT_FOR_CSYNC_0_FAST_SKIP_HSYNC
-        bic   r3, r3, #PSYNC_MASK    // wait for zero after CSYNC
         READ_CYCLE_COUNTER r10
+        bic   r3, r3, #PSYNC_MASK    // wait for zero after CSYNC
         push  {r10}
         tst   r3, #BIT_HSYNC_EDGE    // if leading edge then don't wait for end of hsync (means scroll detection won't work)
-        bne   do_skip_psync_no_old\@
+        bne   do_skip_psync_no_old1\@
+
         pop   {r10}
         mov   r6, r9, lsr #16        //HSYNC_SCROLL_HI
         bic   r9, r9, #0xff000000
@@ -453,49 +469,55 @@ clear_regs\@:
         addlt  r8, r8, #1
         orrlt  r3, r3, #BIT_INHIBIT_MODE_DETECT
         tst    r3, #BIT_NO_H_SCROLL
-        moveq  r7, r8                      // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
+        subeq  r10, r8, r7
+        rsbeq  r10, r10, #2
+        addeq  r1, r1, r10                // increase r1 if no adjustment to r7
+        moveq  r7, r8                     // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
         // Skip the configured number of psync edges (modes 0..6: edges every 250ns, mode 7: edges ever 333ns)
-do_skip_psync_no_old\@:
+do_skip_psync_no_old1\@:
         bl     _get_gpu_data_base_r4
+        mov    r8, #SYNC_ABORT_FLAG
+        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
 .endm
 
 .macro  SKIP_PSYNC_NO_OLD_CPLD_HIGH_LATENCY
-        SKIP_PSYNC_COMMON_NO_OLD_CPLD
-        add    r8, r7, r1
+        mov    r8, #0
         tst    r3, #BIT_RPI234
         orrne  r8, r8, #HIGH_LATENCY_FLAG  //request high latency capture (slightly faster but only really suitable for 9/12bpp modes)
-        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
-skip_psync_no_old_loop\@:
+        SKIP_PSYNC_COMMON_NO_OLD_CPLD
+skip_psync_no_old_loop2\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync
         subs   r7, r7, #1
-        bne    skip_psync_no_old_loop\@
+        bne    skip_psync_no_old_loop2\@
 .endm
 
 .macro  SKIP_PSYNC_NO_OLD_CPLD
+        mov    r8, #0
         SKIP_PSYNC_COMMON_NO_OLD_CPLD
-        add    r8, r7, r1
-        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
-skip_psync_no_old_loop\@:
+skip_psync_no_old_loop1\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync
         subs   r7, r7, #1
-        bne    skip_psync_no_old_loop\@
+        bne    skip_psync_no_old_loop1\@
 .endm
 
-
 .macro  SKIP_PSYNC
-        SETUP_GPU_CAPTURE
-        // called if 4 bits per pixel in non-fast mode so has support for old CPLV v1 & v2
+        mov    r8, #0
+        tst    r3, #BIT_OLD_FIRMWARE_SUPPORT
+        orrne  r8, r8, #OLD_FIRMWARE_FLAG    //request old firmware support  (does double reads so slower but only used on 3bpp)
+        SETUP_GPU_CAPTURE_CPLD
         WAIT_FOR_CSYNC_0_SKIP_HSYNC
-        bic    r3, r3, #PSYNC_MASK             // wait for zero after CSYNC
         READ_CYCLE_COUNTER r10
-        push   {r10}
-        tst    r3, #BIT_HSYNC_EDGE    // if leading edge then don't wait for end of hsync (means scroll detection won't work)
-        bne    do_skip_psync\@
-        pop    {r10}
+        bic   r3, r3, #PSYNC_MASK    // wait for zero after CSYNC
+        push  {r10}
+        tst   r3, #BIT_HSYNC_EDGE    // if leading edge then don't wait for end of hsync (means scroll detection won't work)
+        bne   do_skip_psync3\@
+
+        pop   {r10}
         // Wait for the end of hsync
         WAIT_FOR_CSYNC_1
         READ_CYCLE_COUNTER r14
-        push   {r14}
+        push   {r14}     //save timestamp
+
         // Calculate length of low hsync pulse (in ARM cycles = ns)
         subs   r10, r14, r10
         rsbmi  r10, r10, #0
@@ -533,13 +555,15 @@ notoldfirmwarescroll\@:
         orrlt  r3, r3, #BIT_INHIBIT_MODE_DETECT
 doneoldfirmwarescroll\@:
         tst    r3, #BIT_NO_H_SCROLL
+        subeq  r10, r8, r7
+        rsbeq  r10, r10, #2
+        addeq  r1, r1, r10                // increase r1 if no adjustment to r7
         moveq  r7, r8                     // only allow fine sideways scrolling in bbc / electron mode (causes timing issues in ega mode)
+
         // Skip the configured number of psync edges (modes 0..6: edges every 250ns, mode 7: edges ever 333ns)
-do_skip_psync\@:
+do_skip_psync3\@:
         bl     _get_gpu_data_base_r4
-        add    r8, r7, r1
-        tst    r3, #BIT_OLD_FIRMWARE_SUPPORT
-        orrne  r8, r8, #OLD_FIRMWARE_FLAG    //request old firmware support  (does double reads so slower but only used on 3bpp)
+        mov    r8, #SYNC_ABORT_FLAG
         str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
 skip_psync_loop\@:
         WAIT_FOR_PSYNC_EDGE               // wait for next edge of psync