Full Pi zero 2W support with capture in the GPU on VPU core 2

src/cache.c

@@ -132,7 +132,7 @@ void map_4k_page(int logical, int physical) {
 #endif
 }
 
-void enable_MMU_and_IDCaches(void)
+void enable_MMU_and_IDCaches(int cached_screen_area, int cached_screen_size)
 {
 
    log_debug("enable_MMU_and_IDCaches");
@@ -193,21 +193,7 @@ void enable_MMU_and_IDCaches(void)
    {
       PageTable[base] = base << 20 | 0x04C02 | (shareable << 16) | (bb << 12);
    }
-#if defined(USE_CACHED_SCREEN)
-   for (; base < (SCREEN_START >> 20); base++)
-   {
-      PageTable[base] = base << 20 | 0x01C02;     //uncached area before screen
-   }
-   for (; base < ((SCREEN_START + CACHED_SCREEN_OFFSET) >> 20); base++)
-   {
-      PageTable[base] = base << 20 | 0x01C02;     //uncached part of screen ram
-   }
-   for (; base < ((SCREEN_START + SCREEN_SIZE) >> 20); base++)
-   {
-      PageTable[base] = base << 20 | 0x04C02 | (shareable << 16) | (bb << 12) | (aa << 2);  //cached part of screen ram
-   }
-#endif
-   for (; base < uncached_threshold; base++)      // < 0x3F000000
+   for (; base < uncached_threshold; base++)
    {
       PageTable[base] = base << 20 | 0x01C02;
    }
@@ -217,6 +203,15 @@ void enable_MMU_and_IDCaches(void)
       PageTable[base] = base << 20 | 0x10C16;
    }
 
+#if defined(USE_CACHED_SCREEN)
+   if (cached_screen_area != 0) {
+       for (base = (cached_screen_area >> 20); base < ((cached_screen_area + cached_screen_size) >> 20); base++)
+       {
+          PageTable[base] = base << 20 | 0x04C02 | (shareable << 16) | (bb << 12) | (aa << 2);  //cached part of screen ram
+       }
+   }
+#endif
+
    // suppress a warning as we really do want to copy from src address 0!
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wnonnull"

src/cache.h

@@ -22,7 +22,7 @@
 
 void map_4k_page(int logical, int physical);
 
-void enable_MMU_and_IDCaches(void);
+void enable_MMU_and_IDCaches(int cached_screen_area, int cached_screen_size);
 
 void CleanDataCache (void);
 

src/capture_line_default_twelvebits_8bpp_16bpp.S

@@ -53,31 +53,9 @@ loop_8bpp:
         WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
         CAPTURE_EIGHT_BITS_8BPP_3 r6              // input in r8
 
-        WRITE_R5_R6_IF_LAST
-        cmp     r1, #1
-        popeq   {r0, pc}
+        WRITE_R5_R6
 
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_0 r11             // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_1                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_2                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_3 r7              // input in r8
-
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_0 r12             // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_1                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_2                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_3 r10             // input in r8
-
-        WRITE_R5_R6_R7_R10
-
-        subs    r1, r1, #2
+        subs    r1, r1, #1
         bne     loop_8bpp
 
         pop     {r0, pc}

src/capture_line_fast_twelvebits_8bpp_16bpp.S

@@ -54,30 +54,8 @@ loop_8bpp:
         WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
         CAPTURE_EIGHT_BITS_8BPP_3 r6              // input in r8
 
-        cmp     r1, #1
-        stmeqia r0, {r5, r6}
-        popeq   {r0, pc}
-
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_0 r11             // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_1                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_2                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_3 r7              // input in r8
-
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_0 r12             // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_1                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_2                 // input in r8
-        WAIT_FOR_PSYNC_EDGE_FAST                  // expects GPLEV0 in r4, result in r8
-        CAPTURE_EIGHT_BITS_8BPP_3 r10             // input in r8
-
-        stmia   r0!, {r5, r6, r7, r10}
-        subs    r1, r1, #2
+        stmia   r0!, {r5, r6}
+        subs    r1, r1, #1
         bne     loop_8bpp
 
         pop     {r0, pc}

src/capture_line_inband_4bpp_8bpp.S

@@ -166,6 +166,7 @@ preload_capture_line_inband_4bpp:
         bl      preload_foundmode0inband
         mov     r1, #6
         bl      preload_foundmode0to6inband
+exitpreload:
         pop     {r0, r1}
         str     r0, paletteFlags
         str     r1, inBandPointer
@@ -324,8 +325,8 @@ blank0to6loop_8bpp:
         str     r8, paletteFlags
         pop    {r0, pc}
 
-
 preload_capture_line_inband_8bpp:
+
         push    {lr}
         ldr     r0, paletteFlags
         ldr     r1, inBandPointer
@@ -334,13 +335,9 @@ preload_capture_line_inband_8bpp:
         str     r0, paletteFlags             //disable flags
         SETUP_DUMMY_PARAMETERS
         bl      capture_line_inband_8bpp
-#ifndef USE_MULTICORE
         mov     r1, #3
         bl      preload_foundmode0inband_8bpp
         mov     r1, #6
         bl      preload_foundmode0to6inband_8bpp
-#endif
-        pop     {r0, r1}
-        str     r0, paletteFlags
-        str     r1, inBandPointer
-        pop     {pc}
+        b       exitpreload
+

src/capture_line_mode7_4bpp.S

@@ -250,19 +250,7 @@ process_chars_loop_7_bob:
 
        .align 6
        .ltorg
-                                // all 6 osd buffers must be sequential
-osdbuffer3:
-        .word 0
-osdbufferA1:
-        .word 0
-osdbufferA2:
-        .word 0
-osdbufferA3:
-        .word 0
-charline:
-        .word 0
-r1save:
-        .word 0
+
 
 process_chars_7_advanced:
         // Advanced deinterlace
@@ -284,8 +272,9 @@ process_chars_7_advanced:
         // r12 = pointer into frame buffer (moves within line)
         // r14 = misc
         str    r6, charline
-
+        add    r1, r1, #1                  //fix a rounding issue in GPU capture mode
         SKIP_PSYNC
+        sub    r1, r1, #1
         mov    r1, r1, lsr #1
 
 process_chars_loop_7_advanced:
@@ -471,6 +460,22 @@ process_chars_loop_7_advanced:
         beq    deinterlace1
         cmp    r9, r14
         beq    nodeinterlace1      // if rounding pair then don't deinterlace
+        b      deinterlace1
+                                 // all 6 osd buffers must be sequential
+       .align 6
+osdbuffer3:
+        .word 0
+osdbufferA1:
+        .word 0
+osdbufferA2:
+        .word 0
+osdbufferA3:
+        .word 0
+charline:
+        .word 0
+r1save:
+        .word 0
+
 
 deinterlace1:
         ldr    r14, osdbufferA1       // get OSD bits

src/capture_line_ntsc_8bpp.S

@@ -3,14 +3,9 @@
 
 #include "macros.S"
 
-#ifdef USE_MULTICORE
+#ifdef USE_ARM_CAPTURE
 .macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC
         SKIP_PSYNC_COMMON_NO_OLD_CPLD
-        ldr    r14, =read_pointer
-        add    r8, r1, r7
-        add    r8, r8, #4        //add 4 to compensate for preloading samples
-        str    r8, [r14, #20]     //capture_count
-        dmb    // wait until memory written
         mov    r9, #0
 skip_psync_loop_no_oldL\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync
@@ -25,48 +20,57 @@ skip_psync_loop_no_oldL\@:
         moveq   r11, #0
         // exit with r9 non-zero if burst detected, r11=red linem
 .endm
-
 .macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC_3BPP
+        SKIP_PSYNC_NO_OLD_CPLD_NTSC
+.endm
+
+#else
+
+.macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC
         SKIP_PSYNC_COMMON_NO_OLD_CPLD
-        ldr    r14, =read_pointer
-        add    r8, r1, r7
-        add    r8, r8, #2        //add 2 to compensate for preloading samples
-        str    r8, [r14, #20]     //capture_count
-        dmb    // wait until memory written
+        ldr    r4, =GPU_DATA_0
+        add    r8, r7, r1
+        add    r8, r8, #1 + 4
+        mov    r8, r8, lsr #1
+        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
         mov    r9, #0
-skip_psync_loop_no_oldL3\@:
+skip_psync_loop_no_oldL6\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync
         ands   r10, r8, #(0x10 << PIXEL_BASE)
         orr    r9, r9, r10
         and    r10, r8, #(0x10 << (PIXEL_BASE + 6))
         orr    r9, r9, r10
         subs   r7, r7, #1
-        bne    skip_psync_loop_no_oldL3\@
+        bne    skip_psync_loop_no_oldL6\@
+        push   {r14}     //save timestamp
         tst     r3, #BIT_VSYNC_MARKER
         ldrne   r11, =0x01010101
         moveq   r11, #0
         // exit with r9 non-zero if burst detected, r11=red linem
 .endm
-#else
-.macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC
+
+.macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC_3BPP
         SKIP_PSYNC_COMMON_NO_OLD_CPLD
+        ldr    r4, =GPU_DATA_0
+        add    r8, r7, r1
+        add    r8, r8, #1 + 2
+        mov    r8, r8, lsr #1
+        str    r8, [r4, #(GPU_COMMAND_offset - GPU_DATA_0_offset)]  //command register
         mov    r9, #0
-skip_psync_loop_no_oldL\@:
+skip_psync_loop_no_oldL3\@:
         WAIT_FOR_PSYNC_EDGE_FAST           // wait for next edge of psync
         ands   r10, r8, #(0x10 << PIXEL_BASE)
         orr    r9, r9, r10
         and    r10, r8, #(0x10 << (PIXEL_BASE + 6))
         orr    r9, r9, r10
         subs   r7, r7, #1
-        bne    skip_psync_loop_no_oldL\@
+        bne    skip_psync_loop_no_oldL3\@
+        push   {r14}     //save timestamp
         tst     r3, #BIT_VSYNC_MARKER
         ldrne   r11, =0x01010101
         moveq   r11, #0
         // exit with r9 non-zero if burst detected, r11=red linem
 .endm
-.macro  SKIP_PSYNC_NO_OLD_CPLD_NTSC_3BPP
-        SKIP_PSYNC_NO_OLD_CPLD_NTSC
-.endm
 #endif
 
 .macro NTSC_CAPTURE_BITS_8BPP_MONO
@@ -898,6 +902,7 @@ loop_8bpp6:
 
         pop     {r0, pc}
 
+        .ltorg
 preload_capture_line_ntsc_sixbits_8bpp_cga:
         PRELOAD_BITCOUNT
         SETUP_DUMMY_PARAMETERS
@@ -1206,7 +1211,7 @@ preload_capture_line_ntsc_sixbits_8bpp_mono_auto:
         .ltorg
 
 full_capture_line_ntsc_sixbits_8bpp_mono_auto:
-        SKIP_PSYNC_NO_OLD_CPLD_NTSC         // returns r9 != 0 if burst detected
+       SKIP_PSYNC_NO_OLD_CPLD_NTSC         // returns r9 != 0 if burst detected
         mov    r1, r1, lsr #2
         eor    r8, r12, #NTSC_Y_INVERT     // invert signal so tests can cascade
         cmp    r9, #0                       //no burst?