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1. Design-and-Verification-of-Synchronous-FIFO Design-and-Verification-of-Synchronous-FIFO Public

   This project focuses on the design and verification of a Synchronous FIFO module in Verilog, ensuring synchronized data transfer and accurate FIFO behaviour. The system uses SystemVerilog for testb…

   SystemVerilog

2. LoRa-based-V2V-and-V2I-infrastructure LoRa-based-V2V-and-V2I-infrastructure Public

   LoRa-based V2V and V2I system for EVs enabling real-time data exchange, dynamic charging requests, and TTN cloud integration. Features include a Python GUI for monitoring, charging estimation, and …

   Python

3. Design-and-Implementation-of-an-Electronic-Voting-Machine-EVM-Using-Verilog-VHDL Design-and-Implementation-of-an-Electronic-Voting-Machine-EVM-Using-Verilog-VHDL Public

   The objective of this project is to design and implement an Electronic Voting Machine (EVM) using Verilog or VHDL. The EVM will be a digital system capable of securely and accurately recording vote…

   Verilog

4. Tomasulo-algorithm-for-out-of-order-execution Tomasulo-algorithm-for-out-of-order-execution Public

   A simulation of dynamic instruction scheduling and hazard resolution in modern CPUs, featuring reservation stations, register renaming, and load/store buffers for efficient parallelism.

   Verilog