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This repository was archived by the owner on Jan 26, 2025. It is now read-only.

Issues: hell03end/verilog-uart

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Issues list

add testbench help wanted Extra attention is needed
#1 opened Jun 3, 2018 by hell03end
control data width enhancement New feature or request help wanted Extra attention is needed
#2 opened Jun 3, 2018 by hell03end
Collaborate invite
#5 opened Nov 8, 2022 by AhsanAliUet
Warning: This code does not work properly
#3 opened Nov 4, 2020 by AgnerF
3
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