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[Automated] Merge in tag jdk-24+26
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PullRequest: labsjdk-ce/130
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OracleLabsAutomation authored and marwan-hallaoui committed Dec 1, 2024
2 parents 3111873 + 9f370b9 commit 2ac6228
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Showing 853 changed files with 26,706 additions and 21,146 deletions.
6 changes: 5 additions & 1 deletion make/Main.gmk
Original file line number Diff line number Diff line change
Expand Up @@ -1344,9 +1344,13 @@ test-hotspot-jtreg-native: test-hotspot_native_sanity
test-hotspot-gtest: exploded-test-gtest
test-jdk-jtreg-native: test-jdk_native_sanity

# Set dependencies for doc tests
$(eval $(call AddTestDependency, docs_all, docs-jdk))
test-docs: test-docs_all

ALL_TARGETS += $(RUN_TEST_TARGETS) run-test exploded-run-test check \
test-hotspot-jtreg test-hotspot-jtreg-native test-hotspot-gtest \
test-jdk-jtreg-native
test-jdk-jtreg-native test-docs

################################################################################
################################################################################
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9 changes: 9 additions & 0 deletions make/MainSupport.gmk
Original file line number Diff line number Diff line change
Expand Up @@ -137,6 +137,15 @@ define CleanModule
$(call Clean-include, $1)
endef

define AddTestDependency
test-$(strip $1): $2

exploded-test-$(strip $1): $2

ifneq ($(filter $(TEST), $1), )
TEST_DEPS += $2
endif
endef

################################################################################

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4 changes: 4 additions & 0 deletions make/hotspot/lib/JvmOverrideFiles.gmk
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,10 @@ ifeq ($(TOOLCHAIN_TYPE), gcc)
# Need extra inlining to collapse shared marking code into the hot marking loop
BUILD_LIBJVM_shenandoahMark.cpp_CXXFLAGS := --param inline-unit-growth=1000
endif
# disable lto in g1ParScanThreadState because of special inlining/flattening used there
ifeq ($(call check-jvm-feature, link-time-opt), true)
BUILD_LIBJVM_g1ParScanThreadState.cpp_CXXFLAGS := -fno-lto
endif
endif

LIBJVM_FDLIBM_COPY_OPT_FLAG := $(CXX_O_FLAG_NONE)
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12 changes: 0 additions & 12 deletions make/modules/java.desktop/Java.gmk
Original file line number Diff line number Diff line change
Expand Up @@ -46,18 +46,6 @@ EXCLUDE_FILES += \
javax/swing/plaf/nimbus/SpinnerPainter.java \
javax/swing/plaf/nimbus/SplitPanePainter.java \
javax/swing/plaf/nimbus/TabbedPanePainter.java \
sun/awt/resources/security-icon-bw16.png \
sun/awt/resources/security-icon-bw24.png \
sun/awt/resources/security-icon-bw32.png \
sun/awt/resources/security-icon-bw48.png \
sun/awt/resources/security-icon-interim16.png \
sun/awt/resources/security-icon-interim24.png \
sun/awt/resources/security-icon-interim32.png \
sun/awt/resources/security-icon-interim48.png \
sun/awt/resources/security-icon-yellow16.png \
sun/awt/resources/security-icon-yellow24.png \
sun/awt/resources/security-icon-yellow32.png \
sun/awt/resources/security-icon-yellow48.png \
sun/awt/X11/java-icon16.png \
sun/awt/X11/java-icon24.png \
sun/awt/X11/java-icon32.png \
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17 changes: 0 additions & 17 deletions make/modules/java.desktop/gensrc/GensrcIcons.gmk
Original file line number Diff line number Diff line change
Expand Up @@ -37,23 +37,6 @@ GENSRC_AWT_ICONS_SRC += \
$(X11_ICONS_PATH_PREFIX)/classes/sun/awt/X11/java-icon32.png \
$(X11_ICONS_PATH_PREFIX)/classes/sun/awt/X11/java-icon48.png


AWT_ICONPATH := $(MODULE_SRC)/share/classes/sun/awt/resources

GENSRC_AWT_ICONS_SRC += \
$(AWT_ICONPATH)/security-icon-bw16.png \
$(AWT_ICONPATH)/security-icon-interim16.png \
$(AWT_ICONPATH)/security-icon-yellow16.png \
$(AWT_ICONPATH)/security-icon-bw24.png \
$(AWT_ICONPATH)/security-icon-interim24.png \
$(AWT_ICONPATH)/security-icon-yellow24.png \
$(AWT_ICONPATH)/security-icon-bw32.png \
$(AWT_ICONPATH)/security-icon-interim32.png \
$(AWT_ICONPATH)/security-icon-yellow32.png \
$(AWT_ICONPATH)/security-icon-bw48.png \
$(AWT_ICONPATH)/security-icon-interim48.png \
$(AWT_ICONPATH)/security-icon-yellow48.png

GENSRC_AWT_ICONS_FILES := $(notdir $(GENSRC_AWT_ICONS_SRC))

GENSRC_AWT_ICONS_SHORT_NAME = $(subst .,_,$(subst -,_,$(1)))
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8 changes: 1 addition & 7 deletions src/demo/share/jfc/Font2DTest/FontPanel.java
Original file line number Diff line number Diff line change
Expand Up @@ -1114,13 +1114,7 @@ public void showZoomed() {
/// Position and set size of zoom window as needed
zoomWindow.setLocation( canvasLoc.x + zoomAreaX, canvasLoc.y + zoomAreaY );
if ( !nowZooming ) {
if ( zoomWindow.getWarningString() != null )
/// If this is not opened as a "secure" window,
/// it has a banner below the zoom dialog which makes it look really BAD
/// So enlarge it by a bit
zoomWindow.setSize( zoomAreaWidth + 1, zoomAreaHeight + 20 );
else
zoomWindow.setSize( zoomAreaWidth + 1, zoomAreaHeight + 1 );
zoomWindow.setSize( zoomAreaWidth + 1, zoomAreaHeight + 1 );
}

/// Prepare zoomed image
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Original file line number Diff line number Diff line change
Expand Up @@ -620,7 +620,7 @@ address TemplateInterpreterGenerator::generate_cont_resume_interpreter_adapter()
// Restore Java expression stack pointer
__ ldr(rscratch1, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));
__ lea(esp, Address(rfp, rscratch1, Address::lsl(Interpreter::logStackElementSize)));
// and NULL it as marker that esp is now tos until next java call
// and null it as marker that esp is now tos until next java call
__ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize));

// Restore machine SP
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77 changes: 0 additions & 77 deletions src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2339,83 +2339,6 @@ void C2_MacroAssembler::signum_fp_v(VectorRegister dst, VectorRegister one, Basi
vfsgnj_vv(dst, one, dst, v0_t);
}

void C2_MacroAssembler::compress_bits_v(Register dst, Register src, Register mask, bool is_long) {
Assembler::SEW sew = is_long ? Assembler::e64 : Assembler::e32;
// intrinsic is enabled when MaxVectorSize >= 16
Assembler::LMUL lmul = is_long ? Assembler::m4 : Assembler::m2;
long len = is_long ? 64 : 32;

// load the src data(in bits) to be compressed.
vsetivli(x0, 1, sew, Assembler::m1);
vmv_s_x(v0, src);
// reset the src data(in bytes) to zero.
mv(t0, len);
vsetvli(x0, t0, Assembler::e8, lmul);
vmv_v_i(v4, 0);
// convert the src data from bits to bytes.
vmerge_vim(v4, v4, 1); // v0 as the implicit mask register
// reset the dst data(in bytes) to zero.
vmv_v_i(v8, 0);
// load the mask data(in bits).
vsetivli(x0, 1, sew, Assembler::m1);
vmv_s_x(v0, mask);
// compress the src data(in bytes) to dst(in bytes).
vsetvli(x0, t0, Assembler::e8, lmul);
vcompress_vm(v8, v4, v0);
// convert the dst data from bytes to bits.
vmseq_vi(v0, v8, 1);
// store result back.
vsetivli(x0, 1, sew, Assembler::m1);
vmv_x_s(dst, v0);
}

void C2_MacroAssembler::compress_bits_i_v(Register dst, Register src, Register mask) {
compress_bits_v(dst, src, mask, /* is_long */ false);
}

void C2_MacroAssembler::compress_bits_l_v(Register dst, Register src, Register mask) {
compress_bits_v(dst, src, mask, /* is_long */ true);
}

void C2_MacroAssembler::expand_bits_v(Register dst, Register src, Register mask, bool is_long) {
Assembler::SEW sew = is_long ? Assembler::e64 : Assembler::e32;
// intrinsic is enabled when MaxVectorSize >= 16
Assembler::LMUL lmul = is_long ? Assembler::m4 : Assembler::m2;
long len = is_long ? 64 : 32;

// load the src data(in bits) to be expanded.
vsetivli(x0, 1, sew, Assembler::m1);
vmv_s_x(v0, src);
// reset the src data(in bytes) to zero.
mv(t0, len);
vsetvli(x0, t0, Assembler::e8, lmul);
vmv_v_i(v4, 0);
// convert the src data from bits to bytes.
vmerge_vim(v4, v4, 1); // v0 as implicit mask register
// reset the dst data(in bytes) to zero.
vmv_v_i(v12, 0);
// load the mask data(in bits).
vsetivli(x0, 1, sew, Assembler::m1);
vmv_s_x(v0, mask);
// expand the src data(in bytes) to dst(in bytes).
vsetvli(x0, t0, Assembler::e8, lmul);
viota_m(v8, v0);
vrgather_vv(v12, v4, v8, VectorMask::v0_t); // v0 as implicit mask register
// convert the dst data from bytes to bits.
vmseq_vi(v0, v12, 1);
// store result back.
vsetivli(x0, 1, sew, Assembler::m1);
vmv_x_s(dst, v0);
}

void C2_MacroAssembler::expand_bits_i_v(Register dst, Register src, Register mask) {
expand_bits_v(dst, src, mask, /* is_long */ false);
}

void C2_MacroAssembler::expand_bits_l_v(Register dst, Register src, Register mask) {
expand_bits_v(dst, src, mask, /* is_long */ true);
}

// j.l.Math.round(float)
// Returns the closest int to the argument, with ties rounding to positive infinity.
// We need to handle 3 special cases defined by java api spec:
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10 changes: 0 additions & 10 deletions src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.hpp
Original file line number Diff line number Diff line change
Expand Up @@ -39,9 +39,6 @@
VectorRegister vrs,
bool is_latin, Label& DONE, Assembler::LMUL lmul);

void compress_bits_v(Register dst, Register src, Register mask, bool is_long);
void expand_bits_v(Register dst, Register src, Register mask, bool is_long);

public:
// Code used by cmpFastLock and cmpFastUnlock mach instructions in .ad file.
void fast_lock(Register object, Register box,
Expand Down Expand Up @@ -184,13 +181,6 @@

// intrinsic methods implemented by rvv instructions

// compress bits, i.e. j.l.Integer/Long::compress.
void compress_bits_i_v(Register dst, Register src, Register mask);
void compress_bits_l_v(Register dst, Register src, Register mask);
// expand bits, i.e. j.l.Integer/Long::expand.
void expand_bits_i_v(Register dst, Register src, Register mask);
void expand_bits_l_v(Register dst, Register src, Register mask);

void java_round_float_v(VectorRegister dst, VectorRegister src, FloatRegister ftmp, BasicType bt, uint vector_length);
void java_round_double_v(VectorRegister dst, VectorRegister src, FloatRegister ftmp, BasicType bt, uint vector_length);

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23 changes: 5 additions & 18 deletions src/hotspot/cpu/riscv/interp_masm_riscv.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -179,15 +179,10 @@ void InterpreterMacroAssembler::check_and_handle_earlyret(Register java_thread)

void InterpreterMacroAssembler::get_unsigned_2_byte_index_at_bcp(Register reg, int bcp_offset) {
assert(bcp_offset >= 0, "bcp is still pointing to start of bytecode");
if (AvoidUnalignedAccesses && (bcp_offset % 2)) {
lbu(t1, Address(xbcp, bcp_offset));
lbu(reg, Address(xbcp, bcp_offset + 1));
slli(t1, t1, 8);
add(reg, reg, t1);
} else {
lhu(reg, Address(xbcp, bcp_offset));
revb_h_h_u(reg, reg);
}
lbu(t1, Address(xbcp, bcp_offset));
lbu(reg, Address(xbcp, bcp_offset + 1));
slli(t1, t1, 8);
add(reg, reg, t1);
}

void InterpreterMacroAssembler::get_dispatch() {
Expand All @@ -200,15 +195,7 @@ void InterpreterMacroAssembler::get_cache_index_at_bcp(Register index,
size_t index_size) {
assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
if (index_size == sizeof(u2)) {
if (AvoidUnalignedAccesses) {
assert_different_registers(index, tmp);
load_unsigned_byte(index, Address(xbcp, bcp_offset));
load_unsigned_byte(tmp, Address(xbcp, bcp_offset + 1));
slli(tmp, tmp, 8);
add(index, index, tmp);
} else {
load_unsigned_short(index, Address(xbcp, bcp_offset));
}
load_short_misaligned(index, Address(xbcp, bcp_offset), tmp, false);
} else if (index_size == sizeof(u4)) {
load_int_misaligned(index, Address(xbcp, bcp_offset), tmp, false);
} else if (index_size == sizeof(u1)) {
Expand Down
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