Updated, now works

fpga-logi · Oct 23, 2015 · c03ff2f · c03ff2f
1 parent 4a1f71d
commit c03ff2f
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/logi-camera-demo/hw/logibone/hdl/logibone_camera.vhd b/logi-camera-demo/hw/logibone/hdl/logibone_camera.vhd
@@ -242,7 +242,7 @@ port map
 	generic map( ADDR_WIDTH => 16,
 				WIDTH	=> 16,
 				SIZE	=> 4096,
-				BURST_SIZE => 4,
+				BURST_SIZE => 512,
 				SYNC_LOGIC_INTERFACE => true 
 				)
 	port map(
@@ -404,7 +404,7 @@ cam_control_reg :  wishbone_register
 								  (others => '1');
 
 
-
+	switch_value <= SW;