Merge branch 'master' of https://github.com/fpga-logi/logi-projects

logi-machine-vision/README.TXT

@@ -0,0 +1,11 @@
+Machine Vision Project *************************************************************************
+* DOCUMENTATION: http://valentfx.com/wiki/index.php?title=LOGI_-_Machine_Vision_-_Project
+* DESCRIPTION  **************
+This proect does not require a camera. It loads an image and processes it
+* INSTRUCTIONS *************
+Generate Programming File using Xilinx ISE open: File | New Project | logi-machine-vision/hw/logipi/ise/logipi_machine_vision.xise
+* TROUBLESHOOTING **********
+Please add HowTo!
+* SUGGESTIONS **************
+Open up the individual project folder to build each project.
+*************************************************************************************

logi-motor-control/hw/logibone/hdl/logibone_motor_control.vhd

@@ -93,9 +93,11 @@ end component;
 
 
 	-- my logic
-	signal encoder_count, encoder_control, encoder_speed: std_logic_vector(15 downto 0);
-	signal CHAN_A, CHAN_B : std_logic ;
-	signal pwm_sig : std_logic ;
+	signal encoder_count0, encoder_control, encoder_speed0: std_logic_vector(15 downto 0);
+	signal encoder_count1, encoder_speed1: std_logic_vector(15 downto 0);
+	signal CHAN_A0, CHAN_B0 : std_logic ;
+	signal CHAN_A1, CHAN_B1 : std_logic ;
+	signal pwm_sig0,pwm_sig1 : std_logic ;
 	signal dir_control : std_logic_vector(15 downto 0);
 
 	signal loop_back : std_logic_vector(15 downto 0);
@@ -196,8 +198,8 @@ wbs_ack =>  Intercon_0_wbm_REG0_0_wbs.ack,
 reg_out(0)(15 downto 0) => encoder_control,
 reg_out(1)(15 downto 0) => dir_control,
 reg_out(2) => loop_back,
-reg_in(0)(15 downto 0) => encoder_count,
-reg_in(1)(15 downto 0) => encoder_speed,
+reg_in(0)(15 downto 0) => encoder_count0,
+reg_in(1)(15 downto 0) => encoder_count1,
 reg_in(2) => loop_back
 );
 
@@ -206,20 +208,35 @@ enc0 : encoder_interface
 generic map(FREQ_DIV => 100)
 port map(
 	clk => gls_clk, reset => gls_reset,
-	channel_a => CHAN_A, 
-	channel_b => CHAN_B,
+	channel_a => CHAN_A0, 
+	channel_b => CHAN_B0,
 
-	period => encoder_speed,
+	period => encoder_speed0,
 	pv => open,
 
-	count => encoder_count,
+	count => encoder_count0,
 	reset_count => encoder_control(0) 
 
 );
 
+enc1 : encoder_interface
+generic map(FREQ_DIV => 100)
+port map(
+	clk => gls_clk, reset => gls_reset,
+	channel_a => CHAN_A1, 
+	channel_b => CHAN_B1,
+
+	period => encoder_speed1,
+	pv => open,
+
+	count => encoder_count1,
+	reset_count => encoder_control(8) 
+
+);
+
 
 PWM_0 : wishbone_pwm 
-generic map( nb_chan => 1)
+generic map( nb_chan => 2)
 port map(
 		  -- Syscon signals
 		  gls_clk => gls_clk, gls_reset => gls_reset,
@@ -232,26 +249,27 @@ port map(
 			wbs_write =>  Intercon_0_wbm_PWM_0_wbs.write,
 			wbs_ack =>  Intercon_0_wbm_PWM_0_wbs.ack,
 
-		  pwm_out(0) => pwm_sig
+		  pwm_out(0) => pwm_sig0,
+		  pwm_out(1) => pwm_sig1
 );
 
 
 LED(0) <= BEAT_0_beat_out_top_LED;
-LED(1) <= pwm_sig;
+LED(1) <= pwm_sig0;
 
 -- Connecting inouts
 
-
-CHAN_B <= PMOD1(3);
-CHAN_A <= PMOD1(2);
---'Z' <= PMOD1(7);
-PMOD1(0) <= pwm_sig;
-PMOD1(1) <= dir_control(0);
+CHAN_A0 <= PMOD1(2);
+CHAN_B0 <= PMOD1(3);
+PMOD1(0) <= dir_control(0);
+PMOD1(1) <= pwm_sig0;
 PMOD1(7 downto 4) <= (others => 'Z');
-PMOD2(7 downto 0) <= (others => 'Z');
-
-
 
+CHAN_A1 <= PMOD2(2);
+CHAN_B1 <= PMOD2(3);
+PMOD2(0) <= dir_control(8);
+PMOD2(1) <= pwm_sig1;
+PMOD2(7 downto 4) <= (others => 'Z');
 
 
 

logi-motor-control/sw/simulink/README.txt

@@ -0,0 +1,23 @@
+MATLAB r2014b Simulink Models using BeagleBoneBlack support package for Embedded Coder
+
+Uses motor control bitstream in hw directory.
+
+Tested with PmodHB5 modules plugged into top row of PMOD1 and PMOD2 ports, and 
+two Digilent geared DC motors (1:53 reduction)
+
+Included S-Functions built for MS Windows 64-bits
+
+Runs on standard logibone image referenced in logibone quick start guide, but 
+you must first disable password authentication for ubuntu user in
+sudoers file. Run sudo visudo and add the following on last line: 
+
+ubuntu ALL = NOPASSWD: ALL 
+
+TODO: 
+-Models currently limited to 10Hz max
+-Combine multiple logibone reads and write into a single one for performance?
+-Use logibone library?
+-Load bitstream in block initialization?
+-Bitstream load conditional on checksum register perhaps?
+-Pass certain data as block parameters instead of input signals?
+-Build for win32?

logi-motor-control/sw/simulink/logi_readall.c

@@ -0,0 +1,241 @@
+/*
+ * File: logi_readall.c
+ *
+  *
+  *   --- THIS FILE GENERATED BY S-FUNCTION BUILDER: 3.0 ---
+  *
+  *   This file is an S-function produced by the S-Function
+  *   Builder which only recognizes certain fields.  Changes made
+  *   outside these fields will be lost the next time the block is
+  *   used to load, edit, and resave this file. This file will be overwritten
+  *   by the S-function Builder block. If you want to edit this file by hand, 
+  *   you must change it only in the area defined as:  
+  *
+  *        %%%-SFUNWIZ_defines_Changes_BEGIN
+  *        #define NAME 'replacement text' 
+  *        %%% SFUNWIZ_defines_Changes_END
+  *
+  *   DO NOT change NAME--Change the 'replacement text' only.
+  *
+  *   For better compatibility with the Simulink Coder, the
+  *   "wrapper" S-function technique is used.  This is discussed
+  *   in the Simulink Coder's Manual in the Chapter titled,
+  *   "Wrapper S-functions".
+  *
+  *  -------------------------------------------------------------------------
+  * | See matlabroot/simulink/src/sfuntmpl_doc.c for a more detailed template |
+  *  ------------------------------------------------------------------------- 
+* Created: Mon Mar  9 17:55:47 2015
+*/
+#define S_FUNCTION_LEVEL 2
+#define S_FUNCTION_NAME logi_readall
+/*<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
+/* %%%-SFUNWIZ_defines_Changes_BEGIN --- EDIT HERE TO _END */
+#define NUM_INPUTS          1
+/* Input Port  0 */
+#define IN_PORT_0_NAME      address
+#define INPUT_0_WIDTH       1
+#define INPUT_DIMS_0_COL    1
+#define INPUT_0_DTYPE       uint16_T
+#define INPUT_0_COMPLEX     COMPLEX_NO
+#define IN_0_FRAME_BASED    FRAME_NO
+#define IN_0_BUS_BASED      0
+#define IN_0_BUS_NAME       
+#define IN_0_DIMS           1-D
+#define INPUT_0_FEEDTHROUGH 1
+#define IN_0_ISSIGNED        0
+#define IN_0_WORDLENGTH      8
+#define IN_0_FIXPOINTSCALING 1
+#define IN_0_FRACTIONLENGTH  9
+#define IN_0_BIAS            0
+#define IN_0_SLOPE           0.125
+
+#define NUM_OUTPUTS          1
+/* Output Port  0 */
+#define OUT_PORT_0_NAME      data
+#define OUTPUT_0_WIDTH       1
+#define OUTPUT_DIMS_0_COL    1
+#define OUTPUT_0_DTYPE       uint16_T
+#define OUTPUT_0_COMPLEX     COMPLEX_NO
+#define OUT_0_FRAME_BASED    FRAME_NO
+#define OUT_0_BUS_BASED      0
+#define OUT_0_BUS_NAME       
+#define OUT_0_DIMS           1-D
+#define OUT_0_ISSIGNED        1
+#define OUT_0_WORDLENGTH      8
+#define OUT_0_FIXPOINTSCALING 1
+#define OUT_0_FRACTIONLENGTH  3
+#define OUT_0_BIAS            0
+#define OUT_0_SLOPE           0.125
+
+#define NPARAMS              0
+
+#define SAMPLE_TIME_0        INHERITED_SAMPLE_TIME
+#define NUM_DISC_STATES      1
+#define DISC_STATES_IC       [0]
+#define NUM_CONT_STATES      0
+#define CONT_STATES_IC       [0]
+
+#define SFUNWIZ_GENERATE_TLC 1
+#define SOURCEFILES "__SFB__"
+#define PANELINDEX           6
+#define USE_SIMSTRUCT        0
+#define SHOW_COMPILE_STEPS   0                   
+#define CREATE_DEBUG_MEXFILE 0
+#define SAVE_CODE_ONLY       0
+#define SFUNWIZ_REVISION     3.0
+/* %%%-SFUNWIZ_defines_Changes_END --- EDIT HERE TO _BEGIN */
+/*<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<*/
+#include "simstruc.h"
+
+extern void logi_readall_Outputs_wrapper(const uint16_T *address,
+			uint16_T *data,
+			const real_T *xD);
+extern void logi_readall_Update_wrapper(const uint16_T *address,
+			const uint16_T *data,
+			real_T *xD);
+
+/*====================*
+ * S-function methods *
+ *====================*/
+/* Function: mdlInitializeSizes ===============================================
+ * Abstract:
+ *   Setup sizes of the various vectors.
+ */
+static void mdlInitializeSizes(SimStruct *S)
+{
+
+    DECL_AND_INIT_DIMSINFO(inputDimsInfo);
+    DECL_AND_INIT_DIMSINFO(outputDimsInfo);
+    ssSetNumSFcnParams(S, NPARAMS);
+     if (ssGetNumSFcnParams(S) != ssGetSFcnParamsCount(S)) {
+	 return; /* Parameter mismatch will be reported by Simulink */
+     }
+
+    ssSetNumContStates(S, NUM_CONT_STATES);
+    ssSetNumDiscStates(S, NUM_DISC_STATES);
+
+    if (!ssSetNumInputPorts(S, NUM_INPUTS)) return;
+    ssSetInputPortWidth(S, 0, INPUT_0_WIDTH);
+    ssSetInputPortDataType(S, 0, SS_UINT16);
+    ssSetInputPortComplexSignal(S, 0, INPUT_0_COMPLEX);
+    ssSetInputPortDirectFeedThrough(S, 0, INPUT_0_FEEDTHROUGH);
+    ssSetInputPortRequiredContiguous(S, 0, 1); /*direct input signal access*/
+
+    if (!ssSetNumOutputPorts(S, NUM_OUTPUTS)) return;
+    ssSetOutputPortWidth(S, 0, OUTPUT_0_WIDTH);
+    ssSetOutputPortDataType(S, 0, SS_UINT16);
+    ssSetOutputPortComplexSignal(S, 0, OUTPUT_0_COMPLEX);
+    ssSetNumSampleTimes(S, 1);
+    ssSetNumRWork(S, 0);
+    ssSetNumIWork(S, 0);
+    ssSetNumPWork(S, 0);
+    ssSetNumModes(S, 0);
+    ssSetNumNonsampledZCs(S, 0);
+
+    ssSetSimulinkVersionGeneratedIn(S, "8.4");
+
+    /* Take care when specifying exception free code - see sfuntmpl_doc.c */
+    ssSetOptions(S, (SS_OPTION_EXCEPTION_FREE_CODE |
+                     SS_OPTION_USE_TLC_WITH_ACCELERATOR | 
+		     SS_OPTION_WORKS_WITH_CODE_REUSE));
+}
+
+# define MDL_SET_INPUT_PORT_FRAME_DATA
+static void mdlSetInputPortFrameData(SimStruct  *S, 
+                                     int_T      port,
+                                     Frame_T    frameData)
+{
+    ssSetInputPortFrameData(S, port, frameData);
+}
+/* Function: mdlInitializeSampleTimes =========================================
+ * Abstract:
+ *    Specifiy  the sample time.
+ */
+static void mdlInitializeSampleTimes(SimStruct *S)
+{
+    ssSetSampleTime(S, 0, SAMPLE_TIME_0);
+    ssSetOffsetTime(S, 0, 0.0);
+}
+#define MDL_INITIALIZE_CONDITIONS
+ /* Function: mdlInitializeConditions ========================================
+  * Abstract:
+  *    Initialize the states
+  */
+ static void mdlInitializeConditions(SimStruct *S)
+ {
+   real_T *xD   = ssGetRealDiscStates(S);
+
+
+    xD[0] =  0;
+
+ }
+#define MDL_SET_INPUT_PORT_DATA_TYPE
+static void mdlSetInputPortDataType(SimStruct *S, int port, DTypeId dType)
+{
+    ssSetInputPortDataType( S, 0, dType);
+}
+#define MDL_SET_OUTPUT_PORT_DATA_TYPE
+static void mdlSetOutputPortDataType(SimStruct *S, int port, DTypeId dType)
+{
+    ssSetOutputPortDataType(S, 0, dType);
+}
+
+#define MDL_SET_DEFAULT_PORT_DATA_TYPES
+static void mdlSetDefaultPortDataTypes(SimStruct *S)
+{
+  ssSetInputPortDataType( S, 0, SS_DOUBLE);
+ ssSetOutputPortDataType(S, 0, SS_DOUBLE);
+}
+/* Function: mdlOutputs =======================================================
+ *
+*/
+static void mdlOutputs(SimStruct *S, int_T tid)
+{
+    const uint16_T   *address  = (const uint16_T*) ssGetInputPortSignal(S,0);
+    uint16_T        *data  = (uint16_T *)ssGetOutputPortRealSignal(S,0);
+    const real_T   *xD = ssGetDiscStates(S);
+
+
+    logi_readall_Outputs_wrapper(address, data, xD);
+
+
+}
+#define MDL_UPDATE  /* Change to #undef to remove function */
+/* Function: mdlUpdate ======================================================
+   * Abstract:
+   *    This function is called once for every major integration time step.
+   *    Discrete states are typically updated here, but this function is useful
+   *    for performing any tasks that should only take place once per
+   *    integration step.
+   */
+  static void mdlUpdate(SimStruct *S, int_T tid)
+  {
+    real_T         *xD  = ssGetDiscStates(S);
+    const uint16_T   *address  = (const uint16_T*) ssGetInputPortSignal(S,0);
+    uint16_T        *data  = (uint16_T *)ssGetOutputPortRealSignal(S,0);
+
+    logi_readall_Update_wrapper(address, data,  xD);
+}
+
+
+/* Function: mdlTerminate =====================================================
+ * Abstract:
+ *    In this function, you should perform any actions that are necessary
+ *    at the termination of a simulation.  For example, if memory was
+ *    allocated in mdlStart, this is the place to free it.
+ */
+static void mdlTerminate(SimStruct *S)
+{
+
+
+
+}
+
+#ifdef  MATLAB_MEX_FILE    /* Is this file being compiled as a MEX-file? */
+#include "simulink.c"      /* MEX-file interface mechanism */
+#else
+#include "cg_sfun.h"       /* Code generation registration function */
+#endif
+
+