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| ###################################################### | ||
| ###################################################### | ||
| ## These constraints are for MARK-1 RPI/FPGA shield ## | ||
| ###################################################### | ||
| ###################################################### | ||
| #logi-bone-ra2_1 | ||
| ###################### | ||
| # Timing Constraints # | ||
| ###################### | ||
|
|
||
| ##### Grouping Constraints ##### | ||
| NET "OSC_FPGA" TNM_NET = clk50_grp; | ||
| NET "GPMC_CLK" TNM_NET = clk100_grp; | ||
| NET "SDRAM_CLK" TNM_NET = clk100_grp; | ||
| ##### Clock Period Constraints ##### | ||
| TIMESPEC TS_PER_CLK50 = PERIOD "clk50_grp" 20.0 ns; | ||
| TIMESPEC TS_PER_CLK100 = PERIOD "clk100_grp" 20.0 ns; | ||
|
|
||
| ####################### | ||
| # Pin LOC Constraints # | ||
| ####################### | ||
| #OSCILLATOR | ||
| NET "OSC_FPGA" LOC = "P85"; | ||
|
|
||
| #MISC################################################################################### | ||
| NET "ARD_SCL" LOC = "P80" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| NET "ARD_SDA" LOC = "P79" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "ARD<5>" LOC = "P39" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "ARD<4>" LOC = "P64" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW |PULLUP; | ||
| #NET "ARD<3>" LOC = "P38" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "ARD<2>" LOC = "P21" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW |PULLUP; | ||
| #NET "ARD<1>" LOC = "P87" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW |PULLUP; | ||
| #NET "ARD<0>" LOC = "P84" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW |PULLUP; | ||
| ##LED###################################################################################### | ||
| NET "LED<0>" LOC = "P140" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; # | ||
| NET "LED<1>" LOC = "P74"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; # | ||
| #PUSH BUTTONS############################################################################## | ||
| #NET "PB<0>" LOC = "P83" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; # | ||
| #NET "PB<1>" LOC = "P59" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; # | ||
| ##PUSH BUTTONS############################################################################## | ||
| #NET "SW<0>" LOC = "P75" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; # | ||
| #NET "SW<1>" LOC = "P78" | IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; # | ||
| #BB SPI PORT################################################################################ | ||
| #NET "SYS_SPI_MISO" LOC = "P61";# | ||
| #NET "SYS_SPI_SCK" LOC = "P70"; #used to bitbang bitstream to fpga / Arduino SPI / BB SPI - see http://valentfx.com/wiki/index.php?title=LOGi-Bone_User_Guide | ||
| #NET "SYS_SPI_SS" LOC = "P59"; # | ||
| #NET "SYS_SPI_MOSI" LOC = "P65"; #used to bitbang bitstream to fpga / Arduino SPI / BB SPI | ||
| #PMOD1###################################################################################### | ||
| #NET "PMOD1<0>" LOC = "P112"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<1>" LOC = "P111"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<2>" LOC = "P67"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<3>" LOC = "P66"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<4>" LOC = "P62"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<5>" LOC = "P61"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<6>" LOC = "P58"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD1<7>" LOC = "P57"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| ##PMOD2######################################################################################## | ||
| #NET "PMOD2<0>" LOC = "P56"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD2<1>" LOC = "P55"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD2<2>" LOC = "P46"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW |PULLUP; | ||
| #NET "PMOD2<3>" LOC = "P45"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD2<4>" LOC = "P48"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD2<5>" LOC = "P47"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #NET "PMOD2<6>" LOC = "P44"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW |PULLUP; | ||
| #NET "PMOD2<7>" LOC = "P43"| IOSTANDARD = LVTTL | DRIVE = 2 | SLEW = SLOW ; | ||
| #SATA########################################################################################## | ||
| #GPMC PORT############################################################################## | ||
| #GPMC CLK | ||
| NET "GPMC_CLK" LOC = "P95"| IOSTANDARD = LVTTL | SLEW = FAST | IOB=TRUE ; # | ||
| #GPMC CONTROL | ||
| NET "GPMC_CSN" LOC = "P101"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_ADVN" LOC = "P119"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_OEN" LOC = "P118"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| #NET "GPMC_BEN<0>" LOC = "P117"| IOSTANDARD = LVTTL | SLEW = FAST | IOB=FORCE ; # | ||
| #NET "GPMC_BEN<1>" LOC = "P88"| IOSTANDARD = LVTTL | SLEW = FAST | IOB=FORCE; # | ||
| NET "GPMC_WEN" LOC = "P116"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| #GPMC A/D | ||
| NET "GPMC_AD<0>" LOC = "P97"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<1>" LOC = "P98"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<2>" LOC = "P121"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<3>" LOC = "P120"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<4>" LOC = "P99"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<5>" LOC = "P100"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<6>" LOC = "P124"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<7>" LOC = "P123"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<8>" LOC = "P102"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<9>" LOC = "P105"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<10>" LOC = "P104"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<11>" LOC = "P94"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE; # | ||
| NET "GPMC_AD<12>" LOC = "P114"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<13>" LOC = "P115"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<14>" LOC = "P93"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| NET "GPMC_AD<15>" LOC = "P92"| IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; # | ||
| # | ||
| #NET "SATA_DATA_P" LOC = "P41"; | ||
| #NET "SATA_DATA_N" LOC = "P40"; | ||
| #NET "SATA_CLK_P" LOC = "P51"; | ||
| #NET "SATA_CLK_N" LOC = "P50"; | ||
|
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||
|
|
||
| NET "SDRAM_CKE" LOC = P24 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_CLK" LOC = P23 | IOSTANDARD = LVTTL | SLEW = SLOW | IOB=TRUE ; | ||
| NET "SDRAM_nCAS" LOC = P143 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_nRAS" LOC = P142 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_nWE" LOC = P144 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_BA<0>" LOC = P141 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_BA<1>" LOC = P1 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQM<0>" LOC = P139 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQM<1>" LOC = P22 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<0>" LOC = P5 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<1>" LOC = P6 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<2>" LOC = P7 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<3>" LOC = P8 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<4>" LOC = P35 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<5>" LOC = P34 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<6>" LOC = P33 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<7>" LOC = P32 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<8>" LOC = P30 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<9>" LOC = P29 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<10>" LOC = P2 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<11>" LOC = P27 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_ADDR<12>" LOC = P26 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<0>" LOC = P126 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<1>" LOC = P127 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<2>" LOC = P131 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<3>" LOC = P132 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<4>" LOC = P133 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<5>" LOC = P134 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<6>" LOC = P137 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<7>" LOC = P138 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<8>" LOC = P17 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<9>" LOC = P16 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<10>" LOC = P15 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<11>" LOC = P14 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<12>" LOC = P12 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<13>" LOC = P11 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<14>" LOC = P10 | IOSTANDARD = LVTTL | IOB=TRUE ; | ||
| NET "SDRAM_DQ<15>" LOC = P9 | IOSTANDARD = LVTTL | IOB=TRUE ; |
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