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Merge pull request #23 from fbelavenuto/ixgbevf
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Added ixgbevf module
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fbelavenuto authored Aug 19, 2022
2 parents c084460 + 68bbb89 commit c8c9744
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5 changes: 0 additions & 5 deletions src/ixgbe/.exclude
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broadwell -4.4.180
broadwellnk -4.4.180
bromolow -3.10.108
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1 change: 1 addition & 0 deletions src/ixgbevf/3.x
1 change: 1 addition & 0 deletions src/ixgbevf/4.x/.version
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4.16.5
6 changes: 6 additions & 0 deletions src/ixgbevf/4.x/Makefile
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obj-m += ixgbevf.o

ixgbevf-y := ixgbevf_main.o ixgbevf_ethtool.o ixgbe_vf.o ixgbe_mbx.o

ixgbevf-${CONFIG_PCI_HYPERV:m=y} += ixgbe_hv_vf.o
ixgbevf-y += kcompat.o
139 changes: 139 additions & 0 deletions src/ixgbevf/4.x/ixgbe_common.h
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/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 1999 - 2022 Intel Corporation. */

#ifndef _IXGBE_COMMON_H_
#define _IXGBE_COMMON_H_

#include "ixgbe_type.h"

void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);

u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
void ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
u32 pba_num_size);
s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);

s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_init_led_link_act_generic(struct ixgbe_hw *hw);

s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data);
s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data);
s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data);
s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
u16 *data);
s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
u16 words, u16 *data);
s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
u16 *checksum_val);
s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);

s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
u32 enable_addr);
s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
u32 mc_addr_count,
ixgbe_mc_addr_itr func, bool clear);
s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
u32 addr_count, ixgbe_mc_addr_itr func);
s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);

s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);

s32 ixgbe_validate_mac_addr(u8 *mac_addr);
s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
s32 ixgbe_disable_pcie_primary(struct ixgbe_hw *hw);

s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);

s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);

s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);

s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
u32 vind, bool vlan_on, bool vlvf_bypass);
s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, u32 *vfta_delta, u32 vfta,
bool vlvf_bypass);
s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan, bool vlvf_bypass);
s32 ixgbe_toggle_txdctl_generic(struct ixgbe_hw *hw, u32 vind);

s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
bool *link_up, bool link_up_wait_to_complete);

s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
u16 *wwpn_prefix);

s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);
void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
int strategy);
void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
u8 build, u8 ver, u16 len, const char *str);
u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
u32 length, u32 timeout, bool return_data);
s32 ixgbe_hic_unlocked(struct ixgbe_hw *, u32 *buffer, u32 length, u32 timeout);
s32 ixgbe_shutdown_fw_phy(struct ixgbe_hw *);
s32 ixgbe_fw_phy_activity(struct ixgbe_hw *, u16 activity,
u32 (*data)[FW_PHY_ACT_DATA_COUNT]);
void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);

extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
bool ixgbe_mng_present(struct ixgbe_hw *hw);
bool ixgbe_mng_enabled(struct ixgbe_hw *hw);

void ixgbe_get_etk_id(struct ixgbe_hw *hw, struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_oem_prod_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver);
void ixgbe_get_orom_version(struct ixgbe_hw *hw,
struct ixgbe_nvm_version *nvm_ver);
void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
ixgbe_link_speed speed,
bool autoneg_wait_to_complete);
void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
ixgbe_link_speed speed);
#endif /* IXGBE_COMMON */
206 changes: 206 additions & 0 deletions src/ixgbevf/4.x/ixgbe_hv_vf.c
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// SPDX-License-Identifier: GPL-2.0
/* Copyright(c) 1999 - 2022 Intel Corporation. */

#include "ixgbe_hv_vf.h"

/**
* ixgbevf_hv_update_mc_addr_list_vf - Hyper-V variant - just a stub.
* @hw: unused
* @mc_addr_list: unused
* @mc_addr_count: unused
* @next: unused
* @clear: unused
*/
s32 ixgbevf_hv_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
u32 mc_addr_count, ixgbe_mc_addr_itr next,
bool clear)
{
UNREFERENCED_5PARAMETER(hw, mc_addr_list, mc_addr_count, next, clear);

return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
}

/**
* ixgbevf_hv_update_xcast_mode - Hyper-V variant - just a stub.
* @hw: unused
* @xcast_mode: unused
*/
s32 ixgbevf_hv_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
{
UNREFERENCED_2PARAMETER(hw, xcast_mode);

return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
}

/**
* ixgbevf_hv_set_vfta_vf - Hyper-V variant - just a stub.
* @hw: unused
* @vlan: unused
* @vind: unused
* @vlan_on: unused
* @vlvf_bypass: unused
*/
s32 ixgbevf_hv_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, bool vlvf_bypass)
{
UNREFERENCED_5PARAMETER(hw, vlan, vind, vlan_on, vlvf_bypass);

return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
}

s32 ixgbevf_hv_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
{
UNREFERENCED_3PARAMETER(hw, index, addr);

return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
}

/**
* ixgbevf_hv_check_mac_link_vf - Hyper-V variant; there is no mailbox
* communication.
* @hw: pointer to hardware structure
* @speed: pointer to link speed
* @link_up: true is link is up, false otherwise
* @autoneg_wait_to_complete: unused
*/
s32 ixgbevf_hv_check_mac_link_vf(struct ixgbe_hw *hw,
ixgbe_link_speed *speed,
bool *link_up,
bool autoneg_wait_to_complete)
{
struct ixgbe_mbx_info *mbx = &hw->mbx;
struct ixgbe_mac_info *mac = &hw->mac;
u32 links_reg;
UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);

/* If we were hit with a reset drop the link */
if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout)
mac->get_link_status = true;

if (!mac->get_link_status)
goto out;

/* if link status is down no point in checking to see if pf is up */
links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
if (!(links_reg & IXGBE_LINKS_UP))
goto out;

/* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
* before the link status is correct
*/
if (mac->type == ixgbe_mac_82599_vf) {
int i;

for (i = 0; i < 5; i++) {
udelay(100);
links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);

if (!(links_reg & IXGBE_LINKS_UP))
goto out;
}
}

switch (links_reg & IXGBE_LINKS_SPEED_82599) {
case IXGBE_LINKS_SPEED_10G_82599:
*speed = IXGBE_LINK_SPEED_10GB_FULL;
if (hw->mac.type >= ixgbe_mac_X550) {
if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
*speed = IXGBE_LINK_SPEED_2_5GB_FULL;
}
break;
case IXGBE_LINKS_SPEED_1G_82599:
*speed = IXGBE_LINK_SPEED_1GB_FULL;
break;
case IXGBE_LINKS_SPEED_100_82599:
*speed = IXGBE_LINK_SPEED_100_FULL;
if (hw->mac.type == ixgbe_mac_X550) {
if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
*speed = IXGBE_LINK_SPEED_5GB_FULL;
}
break;
case IXGBE_LINKS_SPEED_10_X550EM_A:
*speed = IXGBE_LINK_SPEED_UNKNOWN;
/* Reserved for pre-x550 devices */
if (hw->mac.type >= ixgbe_mac_X550)
*speed = IXGBE_LINK_SPEED_10_FULL;
break;
default:
*speed = IXGBE_LINK_SPEED_UNKNOWN;
}

/* if we passed all the tests above then the link is up and we no
* longer need to check for link
*/
mac->get_link_status = false;

out:
*link_up = !mac->get_link_status;
return 0;
}

/**
* ixgbevf_hv_set_rlpml_vf - Set the maximum receive packet length
* @hw: pointer to the HW structure
* @max_size: value to assign to max frame size
* Hyper-V variant.
**/
s32 ixgbevf_hv_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size)
{
u32 reg;

/* If we are on Hyper-V, we implement this functionality
* differently.
*/
reg = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(0));
/* CRC == 4 */
reg |= ((max_size + 4) | IXGBE_RXDCTL_RLPML_EN);
IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(0), reg);

return 0;
}

/**
* ixgbevf_hv_negotiate_api_version_vf - Negotiate supported API version
* @hw: pointer to the HW structure
* @api: integer containing requested API version
* Hyper-V version - only ixgbe_mbox_api_10 supported.
**/
int ixgbevf_hv_negotiate_api_version_vf(struct ixgbe_hw *hw, int api)
{
UNREFERENCED_1PARAMETER(hw);

/* Hyper-V only supports api version ixgbe_mbox_api_10 */
if (api != ixgbe_mbox_api_10)
return IXGBE_ERR_INVALID_ARGUMENT;

return 0;
}

/**
* ixgbevf_hv_init_ops_vf - Initialize the pointers for vf
* @hw: pointer to hardware structure
*
* This will assign function pointers, adapter-specific functions can
* override the assignment of generic function pointers by assigning
* their own adapter-specific function pointers.
* Does not touch the hardware.
**/
s32 ixgbevf_hv_init_ops_vf(struct ixgbe_hw *hw)
{
/* Set defaults for VF then override applicable Hyper-V
* specific functions
*/
ixgbe_init_ops_vf(hw);

hw->mac.ops.reset_hw = ixgbevf_hv_reset_hw_vf;
hw->mac.ops.check_link = ixgbevf_hv_check_mac_link_vf;
hw->mac.ops.negotiate_api_version = ixgbevf_hv_negotiate_api_version_vf;
hw->mac.ops.set_rar = ixgbevf_hv_set_rar_vf;
hw->mac.ops.update_mc_addr_list = ixgbevf_hv_update_mc_addr_list_vf;
hw->mac.ops.update_xcast_mode = ixgbevf_hv_update_xcast_mode;
hw->mac.ops.set_uc_addr = ixgbevf_hv_set_uc_addr_vf;
hw->mac.ops.set_vfta = ixgbevf_hv_set_vfta_vf;
hw->mac.ops.set_rlpml = ixgbevf_hv_set_rlpml_vf;

return 0;
}
31 changes: 31 additions & 0 deletions src/ixgbevf/4.x/ixgbe_hv_vf.h
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/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright(c) 1999 - 2022 Intel Corporation. */

#ifndef _IXGBE_HV_VF_H_
#define _IXGBE_HV_VF_H_

/* On Hyper-V, to reset, we need to read from this offset
* from the PCI config space. This is the mechanism used on
* Hyper-V to support PF/VF communication.
*/
#define IXGBE_HV_RESET_OFFSET 0x201

#include "ixgbe_vf.h"

s32 ixgbevf_hv_init_ops_vf(struct ixgbe_hw *hw);
s32 ixgbevf_hv_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
bool *link_up, bool autoneg_wait_to_complete);
s32 ixgbevf_hv_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr);
s32 ixgbevf_hv_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
u32 mc_addr_count, ixgbe_mc_addr_itr,
bool clear);
s32 ixgbevf_hv_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode);
s32 ixgbevf_hv_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
bool vlan_on, bool vlvf_bypass);
s32 ixgbevf_hv_set_rlpml_vf(struct ixgbe_hw *hw, u16 max_size);
int ixgbevf_hv_negotiate_api_version_vf(struct ixgbe_hw *hw, int api);

extern s32 ixgbevf_hv_reset_hw_vf(struct ixgbe_hw *hw);
extern s32 ixgbevf_hv_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr,
u32 vmdq, u32 enable_addr);
#endif /* _IXGBE_HV_VF_H_ */
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