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FIFO depth optimizer for Vitis backend #1037
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FIFO depth optimizer for Vitis backend #1037
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I think it would be good to have a full test, but until we improve the synthesis testing pipeline, maybe mark it with |
To the reviewers: when we agree on how we want to test this, I can open an issue to also include the Vivado/VivadoAccelerator FIFO optimization in the tests, as a future PR, as some changes in the initial implementation of those backends will be needed |
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In general it looks good to me 👍
hls4ml/writer/vitis_writer.py
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f.write('variable clock_period\n') | ||
f.write('set clock_period {}\n'.format(model.config.get_config_value('ClockPeriod'))) | ||
f.write('variable clock_uncertainty\n') | ||
f.write('set clock_uncertainty {}\n'.format(model.config.get_config_value('ClockUncertainty', '12.5%'))) |
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Why do we put a clock uncertainty of 12.5% here? Also in general, would it be better to have a project.tcl template that we edit?
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The default value will be set by the backend, for example here (compare to the same line in Vivado backend). In reality we shouldn't set the default here.
Anyway, I'm testing this PR right now and made some changes as I was going, one of which was to tweak this function so it doesn't work like this anymore. I'll likely finish later today and push all the changes to this branch.
This looks good and ready to be merged. One change I made (which I think is long overdue) is to ensure multiple iterations of the top function are called when user doesn't provide any input. All co-simulation results with io_stream are invalid when only one input is passed, not just the FIFO depth but latency and II. This PR originally suggested to call the top function twice, but in the past I have observed that for some ResNet blocks I needed to run co-sim 4 times (3 times to see the buffers fill up, 4th time to be sure they stopped increasing). I placed 5 to be sure. For large models this may take a lot of time, so we shouldn't go to much larger numbers as a default. |
Issues observed in this review have been addressed
FIFO depth optimizer for the Vitis backend using the built-in cosim FIFO profiling feature of Vitis HLS
project.tcl
file with Vitis attributesbuild_prj.tcl
file to skip the add_vcd_instructions_tcl function in the case of Vitis backendType of change
For a new feature or function, please create an issue first to discuss it
with us before submitting a pull request.
Note: Please delete options that are not relevant.
Tests
Test Configuration:
Checklist
dense_resource
, " 'Resource pragma' is deprecated, use 'bind_op/bind_storage pragma' "pre-commit
on the files I edited or added.There is a small problem with the branched model and adds a linear layer in the input causing a very large FIFO between that layer and the depthwise convolution.