fby4: ff: DIMM and PMIC muxes remain connected to BIC after BIC warm … #1518
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…reset.
Description:
After BIC warm reset, set the latch enable for 'SEL_SMB_MUX_PMIC_R' and 'SEL_SMB_MUX_DIMM_R' to retain the GPIO status when reinitialize GPIO table.
Motivation:
When in CXL ready state, even after performing a BIC warm reset, the DIMM and PMIC muxes should remain connected to BIC.
Test Plan:
- DIMM & VR device address can be scanned after BIC warm reset: Pass
Test log:
-FF:
/*BIC warm reset when power off*/
/*i2c scan I2C_8, I2C_9*/
```
0 devices found on I2C_8
```
0 devices found on I2C_9
/*BIC warm reset when power on*/
/*i2c scan I2C_8, I2C_9*/
```
2 devices found on I2C_8
```
14 devices found on I2C_9
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…reset.
Description:
After BIC warm reset, set the latch enable for 'SEL_SMB_MUX_PMIC_R' and 'SEL_SMB_MUX_DIMM_R' to retain the GPIO status when reinitialize GPIO table.
Motivation:
When in CXL ready state, even after performing a BIC warm reset, the DIMM and PMIC muxes should remain connected to BIC.
Test Plan:
Test log:
-FF:
/BIC warm reset when power off/
/i2c scan I2C_8, I2C_9/
0 devices found on I2C_80 devices found on I2C_9