Change exit code from invalidSyscall to invalidInstruction for invali…

…d load instruction encoding
ethereum-optimism · Jan 21, 2025 · 2c3c7dd · 2c3c7dd
1 parent cfd156c
commit 2c3c7dd
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Showing 4 changed files with 5 additions and 5 deletions.
diff --git a/rvgo/fast/vm.go b/rvgo/fast/vm.go
@@ -590,7 +590,7 @@ func (inst *InstrumentedState) riscvStep() (outErr error) {
 
 		// bits[14:12] set to 111 are reserved
 		if eq64(funct3, byteToU64(0x7)) != 0 {
-			revertWithCode(riscv.ErrInvalidSyscall, fmt.Errorf("illegal instruction %d: reserved instruction encoding", instr))
+			revertWithCode(riscv.ErrIllegalInstruction, fmt.Errorf("illegal instruction %d: reserved instruction encoding", instr))
 		}
 
 		imm := parseImmTypeI(instr)

diff --git a/rvgo/slow/vm.go b/rvgo/slow/vm.go
@@ -774,7 +774,7 @@ func Step(calldata []byte, po PreimageOracle) (stateHash common.Hash, outErr err
 
 		// bits[14:12] set to 111 are reserved
 		if eq64(funct3, byteToU64(0x7)) != (U64{}) {
-			revertWithCode(riscv.ErrInvalidSyscall, fmt.Errorf("illegal instruction %d: reserved instruction encoding", instr))
+			revertWithCode(riscv.ErrIllegalInstruction, fmt.Errorf("illegal instruction %d: reserved instruction encoding", instr))
 		}
 
 		imm := parseImmTypeI(instr)

diff --git a/rvsol/src/RISCV.sol b/rvsol/src/RISCV.sol
@@ -1161,7 +1161,7 @@ contract RISCV is IBigStepper {
                 // LB, LH, LW, LD, LBU, LHU, LWU
 
                 // bits[14:12] set to 111 are reserved
-                if eq64(funct3, toU64(0x7)) { revertWithCode(0xf001ca11) }
+                if eq64(funct3, toU64(0x7)) { revertWithCode(0xbadc0de) }
 
                 let imm := parseImmTypeI(instr)
                 let signed := iszero64(and64(funct3, toU64(4))) // 4 = 100 -> bitflag

diff --git a/rvsol/test/RISCV.t.sol b/rvsol/test/RISCV.t.sol
@@ -2487,7 +2487,7 @@ contract RISCV_Test is CommonTest {
         state.registers[25] = 0xf956;
         bytes memory encodedState = encodeState(state);
 
-        vm.expectRevert(hex"00000000000000000000000000000000000000000000000000000000f001ca11");
+        vm.expectRevert(hex"0000000000000000000000000000000000000000000000000000000000badc0de");
         riscv.step(encodedState, proof, 0);
     }
 
@@ -2501,7 +2501,7 @@ contract RISCV_Test is CommonTest {
 
         bytes memory encodedState = encodeState(state);
 
-        vm.expectRevert(hex"00000000000000000000000000000000000000000000000000000000f001ca11");
+        vm.expectRevert(hex"0000000000000000000000000000000000000000000000000000000000badc0de");
         riscv.step(encodedState, proof, 0);
     }